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9 CONTROL OPERATION INSTRUCTIONS
(4) 2-degree-of-freedom PID operation
2-degree-of-freedom PID operation is performed with the following operation expression.
B
n
C
n
D
n
BW ( MV)
K
: K
P
T
: Integral constant (I), T
I
In the following case, however, note that special processing will be performed.
QnPHCPU/QnPRHCPU (First 5 digits
of the serial No. : 07031 or earlier)
In either of the following cases 1, 2
1. Derivative constant (D)
2. Operation mode (MODE) is any of MAN, LCM and CMV
In any of the following cases 1, 2, 3
1. Integral constant (I)
2. When either of MHA or MLA is
turned to 1
(MVP
3. When either of MHA or MLA is
turned to 1
(MVP
(5) Deviation check
A deviation check is made under the following condition and the result of the check is output to
DVLA of the alarm detection (ALM) and the deviation large alarm (BB1) of the block memory.
DVL
(DVL
|DV|
*1: When DVLI or ERRI in the alarm detection inhibition (INH) is set to 1, DVLA and BB1 show 0 since the
alarm is prohibited.
9 - 15
Item
When forward operation
(PN 1)
When reverse operation
(PN 0)
When forward operation
(PN 1)
When reverse operation
(PN 0)
Gain (P), M
: Derivative gain (MTD)
D
: Derivative constant (D)
D
0 (T
0 (T
I
CT
MH) and
(
DV
n
T
I
CT
ML) and
(
DV
n
T
I
Condition
|DV|
DVLS)
|DV|
DVL
(DVL DVLS)
M
D
B
n-1
M
D
PV
PV
n
( PV
n
M
D
D
n-1
M
D
M
D
D
n-1
M
D
s
Condition
QnPHCPU/QnPRHCPU (First 5 digits
of the serial No. : 07032 or later)
0)
D
In any of the following cases 1, 2, 3
0)
1. Integral constant (I)
2. When either of MHA2 or MLA2 is
turned to 1
0)
(MVP
MH) and
3. When either of MHA2 or MLA 2 is
turned to 1
0)
(MVP
ML) and
DVLA
DVLA
DVLA
Operation expression
T
D
{(DV
2DV
DV
n
n-1
CT
T
D
n-1
PV
)
n-1
T
D
{(PV
2PV
PV
n
n-1
CT
T
D
T
D
{
(PV
2PV
n
n-1
CT
T
D
Bn
(However, the loop
tag past value
memory is set.)
0 (T
0)
I
CT
(
DV
0)
n
T
I
CT
(
DV
0)
n
T
I
Result
*1
BB1
1
BB1
Last value status hold
BB1
0
MELSEC-Q
CT
B
n-1
)
}
n-2
T
D
CT
D
n-1
)
}
n-2
T
D
CT
D
n-1
PV
)
}
n-2
T
D
Processing
0, Dn
0
CT
DV
0
n
T
I
*1
9 - 15
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