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Schematic Diagrams
Processor 2/7
D
Sheet 3 of 66
C
Processor 2/7
34
B
Buffered reset to CPU
13,22,46
A
B - 4 Processor 2/7
5
4
Haswell Processor 2/7 ( MISC,JTAG,CLK )
24,34
44
H_PROCHOT#
24
H_THRMTRIP#
21
H_PM_SYNC
24
H_CPUPW RGD
24
PCH_PLTRST_CPU
CRB 0905
D01A_1018_Alex
D02_1105_Alex
H_PROCHOT#_R
H_PROCHOT#_R
Gary D03 value
C123
C123
H_PROCHOT#
Q26
Q26
G
C390
C390
H_PROCHOT#_EC
MTN7002ZHS3
MTN7002ZHS3
47P_50V_NPO_04
47P_50V_NPO_04
R385
R385
100K_04
100K_04
CAD Note: Capacitor need to be placed
close to buffer output pin
3.3VS
R95
R95
R51
R51
75_04
75_04
1.05VS
10K_04
10K_04
D
D
CRB 0905
CRB 0906
R60
R60
43.2_1%_04
43.2_1%_04
BUF_CPU_RST#
2
G
G
PLT_RST#
S
S
Q9A
Q9A
D
D
MTDN7002ZHS6R
MTDN7002ZHS6R
5
G
G
S
S
Q9B
Q9B
MTDN7002ZHS6R
MTDN7002ZHS6R
R386
R386
*1.5K_1%_04
*1.5K_1%_04
R390
R390
C439
C439
R59
R59
100K_04
100K_04
68P_50V_NPO_04
68P_50V_NPO_04
*750_1%_04
*750_1%_04
5
4
3
U32B
U32B
SKTOCC#
AP32
SKTOCC
H_CATERR#
AN32
CATERR
H_PECI
R128
R128
*10mil_short
*10mil_short
AR27
H_PECI
PECI
FC_AK31
AK31
FC_AK31
H_PROCHOT#
R380
R380
56_1%_04
56_1%_04
H_PROCHOT#_R
AM30
PROCHOT
AM35
H_THRMTRIP#
R61
R61
*10mil_short
*10mil_short
H_THRMTRIP#_R
THERMTRIP
R691
R691
*1K_04
*1K_04
D01a_1009_Alex
1.05VS
AT28
H_PM_SYNC
R139
R139
*10mil_short
*10mil_short
H_PM_SYNC_R
PM_SYNC
H_CPUPW RGD
R114
R114
*10mil_short
*10mil_short
H_CPUPW RGD_R
AL34
PWRGOOD
PM_DRAM_PW RGD
R409
R409
0_04
0_04
VDDPW RGOOD_R
AC10
SM_DRAMPWROK
PCH_PLTRST_CPU
R692
R692
0_04
0_04
CPU_RST#
AT26
PLTRSTIN
CRB 0905
BUF_CPU_RST#
R700
R700
*0_04
*0_04
R412
R412
0_04
0_04
DPLL_REF_CLKN
G28
27
CLK_DPNS_N
DPLL_REF_CLKN
R413
R413
0_04
0_04
DPLL_REF_CLKP
H28
27
CLK_DPNS_P
DPLL_REF_CLKP
R414
R414
0_04
0_04
SSC_DPLL_REF_CLKN
F27
27
CLK_DP_N
SSC_DPLL_REF_CLKN
R415
R415
0_04
0_04
SSC_DPLL_REF_CLKP
E27
27
CLK_DP_P
SSC_DPLL_REF_CLKP
CLK_EXP_N
D26
27
CLK_EXP_N
BCLKN
CLK_EXP_P
E26
27
CLK_EXP_P
BCLKP
SSC CLOCK TERMINATION STUFF
0103
ONLY WHEN SSC CLOCK NOT USED
1u_6.3V_X5R_04
1u_6.3V_X5R_04
VCCIO_OUT
D02_1116_Alex
R694
R694
*10K_04
*10K_04
SSC_DPLL_REF_CLKP
R696
R696
*10K_04
*10K_04
SSC_DPLL_REF_CLKN
D01a_1009_Alex
R418
R418
*100_04
*100_04
H_THRMTRIP#
R693
R693
*0_06
*0_06
FC_AK31
1.05VS
C700
C700
C701
C701
S3 circuit:- DRAM PWR GOOD logic
D04_Reflash_0905_Alex
VDDQ
R427
R427
1.82K_1%_04
1.82K_1%_04
PM_DRAM_PW RGD
21
PM_DRAM_PW RGD
R438
R438
3
2
1
PU/PD for JTAG signals
Haswell rPGA EDS
Haswell rPGA EDS
XDP_TMS
R395
R395
51_04
51_04
MISC
MISC
AP3
SM_RCOMP_0
XDP_TDI_R
R400
R400
51_04
51_04
SM_RCOMP_0
AR3
SM_RCOMP_1
XDP_PREQ#
R397
R397
*51_04
*51_04
SM_RCOMP_1
AP2
SM_RCOMP_2
XDP_TDO_R
R394
R394
51_04
51_04
SM_RCOMP_2
AN3
CPUDRAMRST#
XDP_TCLK
R405
R405
51_04
51_04
SM_DRAMRST
XDP_TRST#
R389
R389
51_04
51_04
AR29
XDP_PRDY#
XDP_TDO_R
R404
R404
*100_04
*100_04
PRDY
AT29
XDP_PREQ#
PREQ
AM34
XDP_TCLK
TCK
AN33
XDP_TMS
TMS
AM33
XDP_TRST#
TRST
AM31
XDP_TDI_R
TDI
AL33
XDP_TDO_R
XDP_DBR_R
1K_04
1K_04
TDO
AP33
XDP_DBR_R
DBR
AR30
XDP_BPM0
BPM_N_0
AN31
XDP_BPM1
DDR3 Compensation Signals
BPM_N_1
AN29
XDP_BPM2
BPM_N_2
AP31
XDP_BPM3
BPM_N_3
AP30
XDP_BPM4
BPM_N_4
AN28
XDP_BPM5
SM_RCOMP_0
R434
R434
BPM_N_5
AP29
XDP_BPM6
BPM_N_6
AP28
XDP_BPM7
SM_RCOMP_1
R425
R425
BPM_N_7
2 OF 9
2 OF 9
SM_RCOMP_2
R433
R433
Processor Pullups/Pull downs
H_PROCHOT#
62_04
62_04
D01A_1018_Alex
H_CPUPW RGD_R
10K_1%_04
10K_1%_04
C108
C108
*0.1u_16V_Y5V_04
*0.1u_16V_Y5V_04
TRACE WIDTH 10MIL, LENGTH <500MILS
S3 circuit:- DRAM_RST# to memory
should be high during S3
VDDQ
R435
R435
*0_04
*0_04
R436
R436
1K_04
1K_04
BSS138 ( VGS 1.5V )
Q41
Q41
MTN7002ZHS3
MTN7002ZHS3
S
D
CPUDRAMRST#
R441 1K_04
R441 1K_04
R432
R432
DDR3_DRAMRST# 9,10,11,12
4.99K_1%_04
4.99K_1%_04
DRAMRST_CNTRL 4,20
C440
C440
0.047u_10V_X7R_04
0.047u_10V_X7R_04
VDD3
13,19,20,21,23,24,25,26,27,29,34,36,37,40,41,42,45,46
3.3VS
5,9,10,11,12,13,14,15,16,17,18,19,20,21,22,24,25,26,27,28,29,30,32,33,34,35,36,37,41,44,46,61
3.3V
2,14,19,29,30,32,36,37,39,41,42
VDDQ
4,6,9,10,11,12,30,39
1.05VS
6,25,26,30,42,44
VCCIO_OUT 5,6,44
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[03] PROCESSOR 2/7
[03] PROCESSOR 2/7
[03] PROCESSOR 2/7
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P15S0-DA3A
6-71-P15S0-DA3A
6-71-P15S0-DA3A
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
Date:
Date:
Date:
Thursday, March 06, 2014
Thursday, March 06, 2014
Thursday, March 06, 2014
Sheet
Sheet
Sheet
2
1
1.05VS
D
3.3VS
R379
R379
100_1%_04
100_1%_04
75_1%_04
75_1%_04
100_1%_04
100_1%_04
VCCIO_OUT
C
R381
R381
R113
R113
B
A
Rev
Rev
Rev
2.0
2.0
2.0
3
3
3
of
of
of
66
66
66
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