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16.5.6 Pulse width modulation (PWM) function
Digital inputs 9 to 12 can be configured as PWM outputs. 2 data points are available per channel for controlling
the PWM signal.
Figure 29: The PWM signal is controlled by setting the pulse width and period duration
16.5.6.1 Period duration of the PWM outputs
Name:
PWMPeriod09 to PWMPeriod12
These registers are used to define the duration of the period duration, i.e. the time base for the respective PWM
output. This time represents the 100% value, which can be resolved to 0.1% through the duty cycle.
Data type
UINT
16.5.6.2 Duty cycle of the PWM outputs
Name:
PWMOutput09 to PWMOutput12
These registers output the duty cycle of the respective PWM output in a resolution of 0.1% of the period duration.
Data type
INT
Example: Period duration T [µs] with a duty cycle of 25% equals a duty time of t
Figure 30: Switch-on time depending on the period duration and duty cycle
Data sheet V1.21
Pulsbreite
U
24 VDC
Periode (Frequenz)
Value
Information
5 to 65535
Period duration, between 5 and 65535 µs: Corresponds to a frequency of 200 kHz to ≈15 Hz
Value
Information
0 to 1000
Duty cycle of the output in 0 to 100.0%
U
24 VDC
t
1
T
t
1
= 0,25 = 25%
T
X20(c)CP1301, X20CP1381 and X20CP1382
t
[µs].
1
t
53
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