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X20(c)CP1301, X20CP1381 and X20CP1382
16.4.1 Digital inputs
Unfiltered
The input status is recorded in a 100 µs cycle.
Filtered
The filtered status is transferred in a 100 µs cycle.
Filtering takes place asynchronously in an interval of 100 μs.
16.4.1.1 Digital input filter
Name:
X2CfO_DI_Filter
This register can be used to specify the filter value for all digital inputs.
The filter value can be configured in steps of 100 μs.
Data type
USINT
16.4.1.2 Input state of digital inputs 1 to 14
Name:
DigitalInput01 to DigitalInput14
These registers are used to indicate the input state of digital inputs 1 to 14.
Data type
Values
USINT
See the bit structure.
Bit structure of register 4096:
Bit
Name
0
DigitalInput01
...
7
DigitalInput08
Bit structure of register 4097:
Bit
Name
0
DigitalInput09
...
5
DigitalInput14
42
Value
Filter
0
No SW filter
1
0.1 ms
...
...
250
25 ms - Higher values are limited to this value
Value
Information
0 or 1
Input status of digital input 1
...
0 or 1
Input status of digital input 8
Value
Information
0 or 1
Input status of digital input 9
...
0 or 1
Input status of digital input 14
Data sheet V1.21
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