16.5.1 Physical configuration of I/O channels
These registers are used to define the functionality of the channels. Depending on the desired configuration, the
following assignments can be made with respect to the existing software and hardware:
• A physical configuration as input or output for mixed channels
• An explicit assignment as direct I/O channel: i.e. digital input or digital output
• An explicit assignment as PWM output
• An explicit assignment as D or F movement output
16.5.1.1 Physical configuration
Name:
X3CfO_PhyIOConfigCh01 to X3CfO_PhyIOConfigCh12
These registers are used to configure the functionality of the channels.
Data type
Values
USINT
See the bit structure.
Bit structure:
Name:
X3CfO_PhyIOConfigCh01 to X3CfO_PhyIOConfigCh04
Channels 1 to 4 are digital outputs and can only be used as direct I/O channel.
Bit
Description
0 - 7
Name:
X3CfO_PhyIOConfigCh05 to X3CfO_PhyIOConfigCh08
Channels 5 to 8 are digital mixed channels and can be configured as either input or output.
Bit
Description
0 - 1
2 - 7
Name:
X3CfO_PhyIOConfigCh09 to X3CfO_PhyIOConfigCh12
Channels 9 to 12 are high-speed digital outputs and can be configured as direct I/O, PWM or movement channels.
Bit
Description
0 - 3
Reserved
4 - 5
6 - 7
Reserved
Data sheet V1.21
X20(c)CP1301, X20CP1381 and X20CP1382
Value
Information
0
Direct I/O operation of output
Value
Information
00
Configured as digital output
01
Reserved
10
Reserved
11
Configured as digital input
0
Direct I/O operation of output
Value
Information
0
00
Direct I/O operation of output
01
Output operated as PWM
10
Reserved
11
Output operated as D/F movement
0
49