Appendix A:
This appendix contains instruction and overhead timing collected for each PACSystems
CPU module. This timing information can be used to predict CPU sweep times. The
information in this appendix is organized as follows:
A-1.1
Boolean Execution Measurements (ms per 1000 Boolean
executions)
CPU Model
CPU310
CPE010
CPE020
CRE020
CPE030
CRE030
CPE040
CRE040
For more information on Execution Times (including Boolean Operation) for Ladder
Diagram instructions, please see A-2.2, RX3i & RSTi-EP Instruction Times.
82
Measured with CPU firmware version 7.18.
Appendix A
Performance Data
82
Simple Address
0.253
0.244
0.095
0.096
0.087
0.090
0.029
0.029
Boolean Category
Complex Address
1.371
1.329
0.543
0.556
0.450
0.451
0.150
0.149
Passed as Parameter
0.467
0.469
0.198
0.194
0.183
0.184
0.061
0.061
193