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Table1. Hardware Ethernet & TCP/IP Protocols stack Registers Map
( Register Base Address is 0x8000 )
Address
Register
0x00
C0_CR
S/W Reset
Memory Test
0x01
C1_CR
0x02
C2_CR
0x03
C3_CR
0x04
0x05
0x06
0x07
C3_ISR
0x08
IR
IM_C3R
0x09
IMR
0x0A – 0x0B
Reserved
0x0C
Reserved
0x0D
Reserved
0x0E
Reserved
0x0F
Reserved
0x10 – 0x13
C0_RW_PR
0x14 – 0x17
C0_RR_PR
0x18 – 0x1B
C0_TA_PR
0x1C – 0x1F
C1_RW_PR
0x20 – 0x23
C1_RR_PR
0x24 – 0x27
C1_TA_PR
0x28 – 0x2B
C2_RW_PR
0x2C – 0x2F
C2_RR_PR
0x30 – 0x33
C2_TA_PR
0x34 – 0x37
C3_RW_PR
0x38 – 0x3B
C3_RR_PR
0x3C – 0x3F
C3_TA_PR
0x40 – 0x43
C0_TW_PR
0x44 – 0x47
C0_TR_PR
0x48 – 0x4B
Reserved
0x4C – 0x4F
C1_TW_PR
0x50 – 0x53
C1_TR_PR
0x54 – 0x57
Reserved
0x58 – 0x5B
C2_TW_PR
0x5C – 0x5F
C2_TR_PR
0x60 – 0x63
Reserved
0x64 – 0x67
C3_TW_PR
0x68 – 0x6B
C3_TR_PR
0x6C – 0x7F
Reserved
0x80 – 0x83
GAR
0x84 – 0x87
SMR
0x88 – 0x8D
SHAR
0x8E – 0x91
SIPR
Recv
Send
Recv
Send
Recv
Send
Recv
Send
C0_ISR
Recv_OK Send_OK Timeout
C1_ISR
Recv_OK Send_OK Timeout
C2_ISR
Recv_OK Send_OK Timeout
Recv_OK Send_OK Timeout
C3R
C2R
C1R
IM_C2R
IM_C1R
Channel 0 Rx Write Pointer Register
Channel 0 Rx Read Pointer Register
Channel 0 Tx ACK Pointer Register
Channel 1 Rx Write Pointer Register
Channel 1 Rx Read Pointer Register
Channel 1 Tx ACK Pointer Register
Channel 2 Rx Write Pointer Register
Channel 2 Rx Read Pointer Register
Channel 2 Tx ACK Pointer Register
Channel 3 Rx Write Pointer Register
Channel 3 Rx Read Pointer Register
Channel 3 Tx ACK Pointer Register
Channel 0 Tx Write Pointer Register
Channel 0 Tx Read Pointer Register
Channel 1 Tx Write Pointer Register
Channel 1 Tx Read Pointer Register
Channel 2 Tx Write Pointer Register
Channel 2 Tx Read Pointer Register
Channel 3 Tx Write Pointer Register
Channel 3 Tx Read Pointer Register
Gateway Address Register
Subnet Mask Register
Source Hardware Address Register
Source IP Address Register
- 4 -
Bit Definitions
Close
Listen
Connect
Close
Listen
Connect
Close
Listen
Connect
Close
Listen
Connect
Closed
Established
Closed
Established
Closed
Established
Closed
Established
C0R
C3
C2
IM_C0R IM_C3
IM_C2
Sock_Init Sys_Init
Sock_Init
Sock_Init
Sock_Init
SInit_OK Init_OK
SInit_OK
SInit_OK
SInit_OK
C1
C0
IM_C1
IM_C0
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