Table of Contents
Advertisement
DSI_LN2_P
59
DSI_LN3_N
60
DSI_LN3_P
61
PWM
29
A reference circuit for the LCM interface is shown below.
LCD_TE
LCD_ RST
ADC
VPH_PWR
DSI _LN3_P
DSI_LN3_N
DSI_LN2_P
DSI_LN2_N
DSI_LN1_P
DSI_LN1_N
DSI_LN0_P
DSI_LN0_N
DSI_ CLK_P
_ CLK_N
DSI
GND
Module
MIPI are high-speed signal lines. It is recommended to add common-mode filters in series near the LCM
connector, to improve protection against electromagnetic radiation interference.
SC206E_Series_Hardware_Design
AO
LCD MIPI lane 2 data (+)
AO
LCD MIPI lane 3 data (-)
AO
LCD MIPI lane 3 data (+)
DO
PWM output
LCM _ LED+
LCM _LED-
1 μF
C4
LDO
IN
OUT
GPIO
EN
GND
1
2
1
2
1
2
1
2
1
2
EMI filter
Figure 19: Reference Circuit Design for LCM Interface
LDO_IOVDD
LDO15A_1V8
NM
LCM_2V8
C1
C2
4.7 μF
100 nF
FL1
3
4
FL2
3
4
FL3
3
4
FL4
3
4
FL5
3
4
Smart Module Series
-
-
-
1.8 V power domain.
1
LEDA
2
NC
3
LEDK
4
NC
5
LPTE
6
RESET
7
LCD_ID
8
NC (SDA-TP)
9
NC (SCL-TP)
C3
10
NC (RST-TP)
1 μF
11
NC (EINT-TP)
12
GND
13
VIO18
14
VCC28
15
NC (VTP-TP)
16
GND
17
MIPI_TDP3
18
MIPI_TDN3
19
GND
20
MIPI_TDP2
21
MIPI_TDN2
22
GND
23
MIPI_TDP1
24
MIPI_TDN1
25
GND
26
MIPI_TDP0
27
MIPI_TDN0
28
GND
29
MIPI_TCP
30
MIPI_TCN
31
GND
32
GND
33
GND
34
GND
LCM
55 / 115
Advertisement
Table of Contents
