Figure 14 Power Down/Reset (Using External Processor) - Enfora Enabler II-G Integration Manual

Integration Guide
Version 1.01
Figure 13 shows a Reset, or power down sequence using the RADIO_PWR/RST signal with the CPU to GSM0108
interface. Note that the I/O and serial lines MUST be either tri-stated or pulled to GND. If this is not done, it cannot
be guaranteed that RADIO_PWR/RST will reset the GSM0108.
BATT
RADIO_PW
R/RST
PWR_CTL
_SIGNAL
I/O level don't care
Serial
don't care
level
System
State
Figure 13 Power Down/Reset (using external processor)
6.8.5 Using VBAK
VBAK is a backup voltage that can maintain the RTC clock and alarm functions. If VBAK is not present in the
system (intentionally or not) and RADIO_PWR/RST is active low, the RTC clock may still be powered if leakage
voltage exists on VCC. Otherwise the RTC clock will loose power and be reset when VCC is restored.
PARAMETER PARAMETER / CONDITIONS
Backup Voltage (Real-Time-Clock)
V Backup Voltage for Real-Time-Clock
BACKUP
I
Input Current (V
BACKUP
No Load on GPIO or Serial Port)
VBAK had been tested in the above scenarios and does not contribute to leakage. It will properly provide backup
power to the RTC clock.
GSM0108PB001
Power Down / RESET Sequence
250ms
don't care
LOW OR TRI-STATE
LOW OR TRI-STATE
= 3.2 V, V = 0 V,
BACKUP BAT
Page 32
don't care
don't care
MIN TYP MAX UNIT
2.7 3.0 4.5
3.0 6.0
1.01 – 01/21/05
Vdc
µ µ µ µ Adc