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Figure 11 External Power Control Signal (Using External Rc Circuit) - Enfora Enabler II-G Integration Manual

Quad band gsm/gprs modems

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Integration Guide

Version 1.01

Figure 10 shows a variation of the connection in Figure 9 External Power Control Signal (no external processor) by

using an external RC circuit to generate a pulse that will allow the processor to enter the RTC deep sleep modes.

This will keep the PWR_CTL_SIGNAL signal low for at least 50ms during startup. To reset the module, power

(BATT) must be cycled, and power must be removed long enough for the RC to discharge.

VBAT

475 k

1uF

Schmitt

Trigger

Figure 10 External Power Control Signal (using external RC circuit)

GSM0108PB001

Machine to Machine configuration, using

external PWON with RC solution

Any State

I/O

Any State

Serial 1

BATT

RADIO_PWR/RST

Float

PWR_CTL_SIGNAL

PWON

Page 29

GSM0108

VBAKup

50ms

1.01 – 01/21/05

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