Quick Reference Table - Supermicro SuperServer 5019S-WR User Manual

SuperServer 5019S-WR User's Manual

Quick Reference Table

Jumper Description
JBR1 BIOS Recovery
JBT1 Clear CMOS
JI2C1/JI2C2 SMB to PCI Slots Enable/Disable
JPB1 BMC Enable/Disable
JPG1 VGA Enable/Disable
JPL1/JPL2 LAN1/LAN2 Enable/Disable
JPME2 Manufacturing Mode Select
JWD1 Watch Dog
LED Description
LE1 Rear UID LED
LEDBMC BMC Heartbeat LED
LEDEC1 EC Heartbeat LED
LEDPWR System Standby Power LED
Connector Description
BT1 Onboard Battery
COM1/COM2 COM1/COM2 Port Headers
Fan1-Fan6 System/CPU Fan Headers
IPMI_LAN IPMI_Dedicated Gigabit (RJ45) Port
I-SATA2-I-SATA7 SATA 3.0 Connectors via Intel PCH (6Gb/s)
Serial Link General Purpose I/O Connection Headers for I-SATA 3.0 Ports (I-SGPIO1 for
I-SGPIO 1/2
I-SATA2-3, I-SGPIO2 for I-SATA4-7)
J23 M.2 Socket 3 (supports 2260, 2280, 22110 for NVMe and SATA SSDs)
JD1 Speaker/Power LED Indicator
JF1 Front Panel Control Header
JIPMB1 4-pin External BMC I 2 C Header (for an IPMI Card)
JL1 Chassis Intrusion Header
JOH1 Overheat LED Indicator
JPI C1 Power I C System Management Bus (Power SMB) Header
2 2
JPWR1 24-pin ATX Main Power Connector
JPWR2 +12V 8-pin CPU Power Connector
JSD1/JSD2 SATA Disk On Module (DOM) Power Connectors
JSTBY1 Standby Power Header
JSXB1A/1B/1C Supermicro Proprietary WIO_L (Left) Add-On Card Slot
JSXB2 Supermicro Proprietary WIO_R (Right) Add-On Card Slot
JTPM1 Trusted Platform Module (TPM)/Port 80 Connector
JUIDB1 UID (Unit Identification) Switch
LAN1/LAN2 Gigabit (RJ45) LAN Ports
14
Default Setting
Pins 1-2 (Normal)
See Chapter 4
Pins 2-3 (Disabled)
Pins 1-2 (Enabled)
Pins 1-2 (Enabled)
Pins 1-2 (Enabled)
Pins 1-2 (Normal)
Pins 1-2 (Reset)
Status
Blue: Unit Identified
Blinking Green: BMC Normal
Blinking Green: EC Normal
Green: Power On
Connector Description
SP1 Internal Speaker/Buzzer
USB 0/1 Back Panel USB 2.0 Ports
USB 2/3, USB 4/5 Front Accessible USB 2.0 Headers
USB 6/7 Back Panel USB 3.0 Ports
USB 8 USB 3.0 Type-A Header
USB 9/10 Front Accessible USB 3.0 Header
VGA Back Panel VGA Port
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Chapter 1: Introduction