Cirrus Logic CRD5378 Manual page 23

Single-channel seismic reference design
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Pin #
Pin Name
1
P0.1
2
P0.0
3
GND
4
D+
5
D-
6
VDD
7
REGIN
8
VBUS
Pin #
Pin Name
9
/RST
C2CK
10
P3.0
C2D
11
P2.7
12
P2.6
13
P2.5
14
P2.4
15
P2.3
16
P2.2
Pin #
Pin Name
17
P2.1
18
P2.0
19
P1.7
20
P1.6
21
P1.5
22
P1.4
23
P1.3
24
P1.2
Pin #
Pin Name
25
P1.1
26
P1.0
27
P0.7
28
P0.6
29
P0.5
30
P0.4
31
P0.3
32
P0.2
DS639RD2
Assignment Description
SYNC
SYNC signal output
SYNC_IO
SYNC signal input from RS-485
Ground
USB differential data transceiver
USB differential data transceiver
+3.3 V power supply input
+5 V power supply input
USB voltage sense input
Assignment Description
RESETz
Power on reset output, active low
Clock input for debug interface
GPIO
General purpose I/O
Data in/out for debug interface
AIN-
ADC input
AIN+
ADC input
GPIO
General Purpose I/O (unused in CRD5378)
MODE2
CS5373A mode control
MODE1
CS5373A mode control
MODE0
CS5373A mode control
Assignment Description
GPIO
General Purpose I/O (unused in CRD5378)
GPIO
General Purpose I/O (CS5378 RESETz)
BYP_EN
I2C bypass switch control
SDA_DE
I2C data driver enable
SCL
I2C clock in/out
SDA
I2C data in/out
SS
SPI chip select output, active low
MOSI
SPI master out / slave in
Assignment Assignment
MISO
SPI master in / slave out
SCK
SPI serial clock
Internal VREF bypass capacitors
DRDYz
Data ready input, active low
RX
UART receiver
TX
UART transmitter
4.096MHZ
External clock input
TIMEB
Time Break output
CRD5378
23

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