Renesas H8S Series User Manual page 16

Table 4 Internal Registers Used (cont)
Register Bit Name
LCR2
LCDAB
HCKS
SUPS
CDS3
CDS2
CDS1
CDS0
MSTPCRD
MSTPD6
(4) RAM Usage
No RAM is used in this sample task.
REJ06B0486-0100/Rev.1.00
LCD Display Using 1/4 Duty Drive (LCD Controller/Driver)
Description
LCD control register 2
A waveform/B waveform switching control
Specifies whether the A waveform or B waveform is
used as the LCD drive waveform.
• LCDAB = 0: Drive using the A waveform
• LCDAB = 1: Drive using the B waveform
Triple step-up voltage circuit clock select
Selects the clock used for the triple step-up voltage
circuit. This bit selects a clock which is equivalent to
the clock specified by the LCD operating control
register (LCR) divided by 4 or 8 as the step-up voltage
circuit clock.
• HCKS = 0: Clock equivalent to LCD operating clock
divided by 4 selected as step-up voltage circuit
clock
• HCKS = 1: Clock equivalent to LCD operating clock
divided by 8 selected as step-up voltage circuit
clock
Drive power select, triple step-up voltage circuit control
The triple step-up voltage circuit stops operating when
V is selected as the drive power supply. The triple
CC
step-up voltage circuit starts operating when the LCD
input reference voltage (VLCD3) is selected as the
drive power supply.
• SUPS = 0: Drive power supply is V
voltage circuit halts
• SUPS = 1: Drive power supply is triple step-up
voltage of the LCD input reference voltage
(VLCD3); triple step-up voltage circuit operates
Selection of duty cycle for charge/discharge pulse
Selects the duty cycle for periods when the power
supply divider resistance is connected to the power
supply circuit. A duty cycle of 0 specifies a fixed state
in which the power supply divider resistance is
separated from the power supply circuit. Therefore, it
is necessary to supply power to pins V1, V2, and V3
from an external circuit.
• CDS3 = 0, CDS2 = 0, CDS1 = 0, CDS0 = 0: Duty
cycle = 1
Module stop control register D
• MSTPD6 = 0: LCD controller/driver module stop
mode cleared
• MSTPD6 = 1: LCD controller/driver module stop
mode set
March 2005
Address
H'FFFFC2
Bit 7
Bit 5
Bit 4
, triple step-up
CC
Bit 3
Bit 2
Bit 1
Bit 0
H'FFFF60
Bit 6
H8S Family
Set Value
H'00
0
0
0
CDS3 = 0
CDS2 = 0
CDS1 = 1
CDS0 = 1
H'BF
0
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