Table of Contents
Advertisement
Overview
6
Jumper Descriptions and Default Settings
7
Connector Descriptions
8
LED Descriptions
1
Overview
The ADS54J69EVM is an evaluation module (EVM) designed to evaluate the ADS54J69 high-speed,
JESD204B interface ADCs. The EVM includes an onboard clocking solution (LMK04828), transformer-
coupled inputs, full power solution, and easy-to-use software GUI and USB interface.
The following features apply to this EVM:
•
Transformer-coupled signal input network allowing a single-ended signal source from 0.4 MHz to 800
MHz
•
LMK04828 system clock generator that generates field-programmable gate array (FPGA) reference
clocks for the high-speed serial interface and may be used to generate the ADC sampling clock
(default setting)
•
Transformer-coupled clock input network to test the ADC performance with a very low-noise clock
source
•
High-speed serial data output over a standard FPGA Mezzanine Card (FMC) interface connector
The ADS54J69EVM is designed to work seamlessly with the TSW14J56EVM, Texas Instruments'
JESD204B data capture/pattern generator card, through the High Speed Data Converter Pro (HSDC Pro)
software tool for high-speed data converter evaluation. The ADS54J69EVM was also designed to work
with many of the development kits from leading FPGA vendors that contain an FMC connector.
1.1
Required Hardware
The following equipment is included in the EVM evaluation kit:
•
ADS54J69 Evaluation Board (EVM)
•
Power supply cable
•
Mini-USB cable
The following list of equipment are items that are not included in the EVM evaluation kit but are items
required for evaluation of this product in order to achieve the best performance:
•
TSW14J56EVM Data Capture Board, two +5-V power supplies, and Mini-USB cable
•
Computer running Microsoft
•
One Low-Noise Signal Generator. Recommendations:
– RF generator, > +17 dBm, < –40 dBc harmonics, < 500 fs jitter 20 kHz–20 MHz, 10-MHz to 2-GHz
frequency range
– Examples: TSW2170EVM, HP HP8644B, Rohde & Schwarz SMA100A
•
Bandpass filter for desired analog input. Recommendations:
– Bandpass filter, ≥ 60-dB harmonic attenuation, ≤ 5% bandwidth, > +18-dBm power, < 5-dB insertion
loss
– Examples: Trilithic 5VH-series Tunable BPF, K&L BT-series Tunable BPF, TTE KC6 or KC7-series
Fixed BPF
•
Signal path cables, SMA and/or BNC with BNC-to-SMA adapters
2
ADS54J69EVM
..............................................................................
....................................................................................................
...........................................................................................................
Windows
8, Windows 7, or Windows XP
®
®
Copyright © 2016, Texas Instruments Incorporated
SLAU662B – January 2016 – Revised May 2016
Submit Documentation Feedback
www.ti.com
15
15
16
Advertisement
Table of Contents
