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Philips Semiconductors
5.2 Pin description
Table 2:
Pin description
Symbol
Pin
DIP40 PLCC44 LQFP48
A0
28
31
A1
27
30
A2
26
29
CSA, CSB 14, 15 16, 17
D0-D7
1-8
2-9
GND
20
22
9397 750 11621
Product data
Dual UART with 16 bytes of transmit and receive FIFOs and IrDA
1
D5
D6
2
D7
3
4
RXB
RXA
5
TXRDYB
6
7
TXA
TXB
8
OP2B
9
10
CSA
CSB
11
N.C.
12
Fig 4. LQFP48 pin configuration.
Type Description
28
I
Address 0 select bit. Internal register address selection.
27
I
Address 1 select bit. Internal register address selection.
26
I
Address 2 select bit. Internal register address selection.
10, 11
I
Chip Select A, B (Active-LOW). This function is associated with individual
channels, A through B. These pins enable data transfers between the user
CPU and the SC16C2550 for the channel(s) addressed. Individual UART
sections (A, B) are addressed by providing a logic 0 on the respective CSA,
CSB pin.
44-48,
I/O
Data bus (bi-directional). These pins are the 8-bit, 3-State data bus for
1-3
transferring information to or from the controlling CPU. D0 is the least
significant bit and the first data bit in a transmit or receive serial data
stream.
17
I
Signal and power ground.
Rev. 03 — 19 June 2003
SC16C2550IB48
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
SC16C2550
encoder/decoder
36
RESET
35
DTRB
34
DTRA
33
RTSA
32
OP2A
31
RXRDYA
30
INTA
29
INTB
28
A0
27
A1
26
A2
25
N.C.
002aaa104
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