Dynamic Characteristics - Philips SC16C2550 Manual

Philips Semiconductors

10. Dynamic characteristics

Table 26: AC electrical characteristics
= − 40 ° C to +85 ° C; V
T
amb
Symbol Parameter
t , t clock pulse duration
1w 2w
t oscillator/clock frequency
3w
t address set-up time
6s
t address hold time
6h
t IOR delay from chip select
7d
t IOR strobe width
7w
t chip select hold time from IOR
7h
t read cycle delay
9d
t delay from IOR to data
12d
t data disable time
12h
t IOW delay from chip select
13d
t IOW strobe width
13w
t chip select hold time from IOW
13h
t write cycle delay
15d
t data set-up time
16s
t data hold time
16h
t delay from IOW to output
17d
t delay to set interrupt from Modem
18d
input
t delay to reset interrupt from IOR
19d
t delay from stop to set interrupt
20d
t delay from IOR to reset interrupt
21d
t delay from start to set interrupt
22d
t delay from IOW to transmit start
23d
t delay from IOW to reset interrupt
24d
t delay from stop to set RXRDY
25d
t delay from IOR to reset RXRDY
26d
t delay from IOW to set TXRDY
27d
t delay from start to reset TXRDY
28d
t Reset pulse width
RESET
N baud rate divisor
[1] Applies to external clock, crystal oscillator max 24 MHz.
IOWstrobe = ------------------------------------- -
[2]
max (
2 Baudrate
= 333 ns (for Baudrate
max
= 1 µs (for Baudrate
= 460.8 kbits/s)
max
= 4 µs (for Baudrate
= 115.2 kbits/s)
max
[3] When in both DMA mode 0 and FIFO enable mode, the write cycle delay should be larger than one x
9397 750 11621
Product data
Dual UART with 16 bytes of transmit and receive FIFOs and IrDA
= 2.5 V, 3.3 V or 5.0 V ± 10%, unless otherwise specified.
CC
Conditions
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
25 pF load
1
)
max
= 1.5 Mbits/s)
Rev. 03 — 19 June 2003
2.5 V
Min Max Min
10 - 6
[1]
- 48 -
0 - 0
0 - 0
10 - 10
77 - 26
0 - 0
20 - 20
- 77 -
- 15 -
10 - 10
[2]
20 - 20
0 - 0
[3]
25 - 25
20 - 20
15 - 5
- 100 -
- 100 -
- 100 -
- 1 -
- 100 -
- 100 -
8 24 8
- 100 -
- 1 -
- 100 -
- 100 -
- 8 -
200 - 40
− 1
16
1 2 1
SC16C2550
encoder/decoder
3.3 V 5.0 V
Max Min Max
- 6 -
80 80
- 0 -
- 0 -
- 10 -
- 23 -
- 0 -
- 20 -
26 - 23
15 - 15
- 10 -
[2] [2]
- 15 -
- 0 -
- 20 -
- 15 -
- 5 -
33 - 29
24 - 23
24 - 23
1 - 1
29 - 28
45 - 40
24 8 24
45 - 40
1 - 1
45 - 40
45 - 40
8 - 8
- 40 -
− 1 − 1
16 16
2 1 2
, clock cycle.
1
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Unit
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
clk
ns
ns
R
clk
ns
R
clk
ns
ns
R
clk
ns
R
clk
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