Advantech ASMB-925 Series User Manual page 72

Execute Disable Bit

This item enables/disables the Execute Disable Bit function. The Optimal and
Fail-Safe default setting is Enabled. If disabled, the BIOS forces the XD feature
flag to always return to 0.
VMX

This item enables/disables Intel
processors that support Intel
Enable SMX

This item enables/disables safer mode extensions (SMX). SMX provides a
means for system software to launch an MLE and establish a measured envi-
ronment within the platform to support trust decisions by end users.
Hardware Prefetcher

Hardware Prefetcher is a technique that retrieves instructions and/or data from
memory and uploads it to the CPU cache memory before the CPU needs it for
improved load-to-use latency.
Adjacent Cache Prefetch

The Adjacent Cache-Line Prefetch mechanism, like automatic Hardware
Prefetching, operates without programmer intervention. When enabled, two 64-
byte cache lines are fetched into a 128-byte sector, regardless of whether the
additional cache line has been requested or not.
DCU Streamer Prefetcher

This item enables/disables prefetching of the next L1 data line based on multiple
loads in same cache line.
DCU IP Prefetcher

This item enables/disables prefetching of the next L1 line based on sequential
load history.
DCU Mode

This item is used to change the data cache unit mode.
AES-NI

This item enables/disables CPU advanced encryption standard instructions.
ASMB-925 User Manual
®
Virtual Machine Extensions (VMX) for IA-32
®
Vanderpool Technology.
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