Telit Wireless Solutions E922-3GR Series Hardware User's Manual
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Telit Wireless Solutions E922-3GR Series Hardware User's Manual

Telit Wireless Solutions E922-3GR Series Hardware User's Manual

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xE922-3GR
Hardware User Guide
Rev.0.8 - 2017-01-05
1VV0301272

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Summary of Contents for Telit Wireless Solutions E922-3GR Series

  • Page 1 xE922-3GR Hardware User Guide Rev.0.8 - 2017-01-05 1VV0301272...
  • Page 2 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 APPLICABILITY TABLE PRODUCT HE922-3GR WE922-3GR APPLICABILITY TABLE 1 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 2 of 112...
  • Page 3 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE Notice While reasonable efforts have been made to assure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from use of the information obtained herein.
  • Page 4 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Usage and Disclosure Restrictions License Agreements The software described in this document is the property of Telit and its licensors. It is furnished by express license agreement only and may be used only in accordance with the terms of such an agreement.

  • Page 5: Table Of Contents

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Contents Introduction ............. 9 1.1. Scope ............9 1.2. Audience ............. 9 1.3. Contact Information, Support ........10 1.4. Text Conventions..........10 1.5. Supporting documents ........... 11 1.6. Product Variants ..........11 1.7. Abbreviations ..........
  • Page 6 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 4.2. Recommended operating conditions ........39 4.3. Logic Level Specifications ........39 Power supply ............ 41 5.1. Input supply ..........41 5.2. Output supply ..........42 5.2.1. Linear voltage regulators ........42 5.2.1.1. VAUX_1P8V ..........42 5.2.1.2.
  • Page 7 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 10.2. LVDS ............. 62 10.3. Backlight control ..........64 10.4. LED_CURSINK ..........65 10.5. Touch panel ..........66 Camera interface ..........67 Peripheral interfaces ..........71 12.1. I2C ............71 12.2. USIF ............. 72 12.3.
  • Page 8 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 16.2. WiFi/BT Antenna Requirements ........93 16.3. GNSS Antenna Requirements ........93 16.3.1. Combined GNSS Antenna .......... 94 16.3.2. Linear and Patch GNSS Antenna ........94 16.3.3. Front End Design Considerations ........94 16.3.4.

  • Page 9: Introduction

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Introduction 1.1. Scope The aim of this document is to introduce Telit xE922-3GR modules as well as present possible and recommended hardware solutions useful for developing a product based on the xE922-3GR modules. All the features and solutions detailed are applicable to all xE922-3GR, where “xE922-3GR”...

  • Page 10: Contact Information, Support

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 1.3. Contact Information, Support For general contact, technical support, to report documentation errors and to order manuals, contact Telit’s Technical Support Center (TTSC) at: TS-NORTHAMERICA@telit.com if located in North America For other regions, Collabnet Telit web portal can be used at https://teamforge.telit.com (account can be asked at support.collabnet@telit.com Alternatively, use: http://www.telit.com/en/products/technical-support-center/contact.php...

  • Page 11: Supporting Documents

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 1.5. Supporting documents 1VV0301249_EVB USER GUIDE.pdf · 1VV0301285_IFBD HW User Guide xE922-3GR.pdf · 1VV0301324_MMI_EXT_CARD_xE922_3GR_HW USER GUIDE · 80504NT11473A Thermal Guidelines.pdf · For further detailed information, HW/SW user manuals and application notes related to the INTEL chipset applied for this RF module, please consult Intel Business Link Support (IBL): https://businessportal.intel.com 1.6.
  • Page 12 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 GLONASS Global orbiting navigation satellite system GNSS Global navigation satellite system GPIO General-purpose input/output GPRS General packet radio services Global positioning system Global system for mobile communications Human machine interface Inter-integrated circuit Image Signal Processor Inter die interface Low Energy LVDS...

  • Page 13: General Product Description

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 General Product Description 2.1. Overview Telit’s module family xE922-3GR is based on Intel’s IoTG Atom x3 Quad Core processor dual chip platform. DBB : SoC Atom x3 CPU: Quad Core (Silvermont) 1.16 GHz ·...
  • Page 14 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 GNSS · Audio · Analog measurement · Power management · The module incorporates the following key technologies: 2G/3G cellular subsystem · GNSS subsystem · WiFi and Bluetooth subsystems · Display subsystem · Camera subsystem ·...

  • Page 15: General Functionality And Main Features

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 2.2. General Functionality and Main Features The xE922-3GR family of IoT modules features 2G/3G modem, GNSS and WiFi/BT connectivity together with an on-chip powerful application processor and a rich set of interfaces. This overview sums all key interfaces offered by the module , consult the documentation on INTEL’s IBL supporting website for actual implementation state.
  • Page 16 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 o 1x mono earpiece output o 1x mono speaker (classD 700mW/3.8V/8 ohm) Dual digital microphone · I2S digital audio IO ( pinning multiplexed with USIF1 port) · E) Display subsystem Up to 1080p, 24-bit color, 1080p 30fps (yocto) /720p 50fps (android) MIPI-DSI (one x4 lanes port, tearing effect timing control) ·...
  • Page 17 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 o Reduction of switching power consumption by clock gating. o Reduction of leakage power by switching off non active logic. o Dynamic Frequency Voltage Scaling reducing the supply voltage depending on the perfomance requirements of the system The following system operating modes are defined : ·...
  • Page 18 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 o Exponentiation accelerator – supports RSA(1024.2048) o Hashing engines : MD5, HMAC, SHA1/256 o True-RNG Secure memory : isolated memory region IMR for secure VM · Secure boot : root of trust is SEC ROM ·...

  • Page 19: Reference Table Of Rf Bands Characteristics

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 o I2C_AUX : auxiliary use o I2C_CAM / I2C_TP : available when not applied for camera and/or touchpad control · USIF1 port: configurable as SPI or UART (up to 48MHz) (multiplexed with I2S) ·...

  • Page 20: Wifi/Bluetooth

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Freq. TX Mode Freq. RX (MHz) Channels TX - RX offset (MHz) GSM 850 824.2 ~ 848.8 869.2 ~ 893.8 128 ~ 251 45MHz 890 ~ 915 935 ~ 960 0 ~ 124 45 MHz EGSM 900 880 ~ 890...

  • Page 21: Sensitivity

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Data retrieval to prevent terror attacks 2.5. Sensitivity 3G =< -110 dBm · 2G CS1 =< -111 dBm · 2G CS4 =< -103 dBm · Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved.

  • Page 22: High Level Block Diagram

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 2.6. High level block Diagram Digital baseband DBB SoC: · Intel IoTG Atom x3 (quad-core CPU/GPU), multimedia & connectivity, cellular modem accelerators MCP multi chip package memory subsystem ( eMMC+ LPDDR3) Analog baseband ABB : ·...

  • Page 23: Environmental Requirements

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 2.7. Environmental requirements 2.7.1. Temperature range Operating -20 ~ +55°C : This range is defined by 3GPP (the global standard for Temperature Range wireless mobile communication). Telit guarantees its modules to comply with all the 3GPP requirements and to have full functionality of the module with in this range.

  • Page 24: Xe922-3Gr Mechanical Specifications

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 2.8. xE922-3GR Mechanical Specifications 2.8.1. Dimensions The Telit xE922-3GR module overall dimensions are: Length: 34 mm, +/- 0.15 mm Tolerance • • Width: 40 mm, +/- 0.15 mm Tolerance • Thickness: 3.0 mm, +/- 0.15 mm Tolerance 2.8.2.

  • Page 25: Xe922-3Gr Module Pin Out

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 xE922-3GR Module pin out 3.1. PIN table Signal descriptions Type USB 2.0 Interface USB_ID USB_ID, USB DRD use Analog USB_DP USB differential Data (+) Analog USB_DN USB differential Data (-) Analog VBUS_DET VBUS detection Analog Main Camera CSI1_DP0...
  • Page 26 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 DSI_DP0 LCD DSI Data_0 Positive Analog DSI_DN0 LCD DSI Data_0 Negative Analog DSI_DP1 LCD DSI Data_1 Positive Analog DSI_DN1 LCD DSI Data_1 Negative Analog DSI_DP2 LCD DSI Data_2 Positive Analog DSI_DN2 LCD DSI Data_2 Negative Analog DSI_DP3 LCD DSI Data_3 Positive...
  • Page 27 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 SD_CLK MMC card clock CMOS_1.8/3V SD_CMD MMC card command CMOS_1.8/3V SDIO Interface SDIO_CLK CMOS 1.8V SDIO_CMD CMOS 1.8V SDIO_DAT0 CMOS 1.8V SDIO_DAT1 CMOS 1.8V SDIO_DAT2 CMOS 1.8V SDIO_DAT3 CMOS 1.8V USIF 1 (UART/SPI) USIF1_RXD UART1 / SPI1 Serial data input CMOS 1.8V...
  • Page 28 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 AE20 MICN1 Earpiece microphone 1 signal input; phase- Analog AF19 MICP2 Headset microphone 2 signal input; phase+ Analog AH19 MICN2 Headset microphone 2 signal input; phase- Analog AJ18 VMIC_BIAS Analog Microphone bias PWR out AJ20 HP_OUT_R Headset Right Signal Out...
  • Page 29 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 GPIO67_EINT0 GPIO / External IRQ CMOS 1.8V GPIO72_EINT9 GPIO / External IRQ CMOS 1.8V GPIO73_EINT10 GPIO / External IRQ CMOS 1.8V Miscellaneous Functions AR16 ON_OFF Power ON/OFF MAIN_RESET_IN MAIN_RESET AR14 LED_CURSINK GP LED Driver (Sink) HW_KEY Product ID for Production testing GNSS_FTA...
  • Page 30 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Auxiliary 3.0V power supply (shared with internal VAUX_3P0V PWR out eMMC supply) AA20 V_RTC RTC backup PWR in GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND...
  • Page 31 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND...
  • Page 32 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND GROUND...
  • Page 33 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 AA10 GROUND AA12 GROUND AA14 GROUND AA16 GROUND GROUND GROUND GROUND AB11 GROUND AB13 GROUND AB15 GROUND GROUND GROUND GROUND AC10 GROUND AC12 GROUND AC14 GROUND AC16 GROUND AC20 GROUND GROUND GROUND GROUND GROUND AD11 GROUND...
  • Page 34 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 AF17 GROUND GROUND GROUND GROUND GROUND AG10 GROUND AG12 GROUND AG14 GROUND AG16 GROUND GROUND GROUND GROUND AH11 GROUND AH13 GROUND AH15 GROUND GROUND GROUND GROUND AJ10 GROUND AJ12 GROUND AJ14 GROUND AJ16 GROUND GROUND GROUND...
  • Page 35 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 AM11 GROUND AM13 GROUND AM15 GROUND AN18 GROUND AN20 GROUND GROUND GROUND AP19 GROUND AP21 GROUND GROUND GROUND AT10 GROUND AT14 GROUND GROUND GROUND GROUND AU11 GROUND AU13 GROUND AU15 GROUND GROUND GROUND GROUND GROUND GROUND...
  • Page 36 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 RFU11 RFU12 RFU13 RFU14 RFU15 RFU16 RFU17 RFU18 RFU19 RFU20 RFU21 RFU22 RFU23 RFU24 RFU25 RFU26 RFU27 RFU28 RFU29 RFU30 RFU31 RFU32 RFU33 RFU34 RFU35 RFU36 RFU37 RFU38 RFU39 AR12 RFU40 RFU41 AB19 RFU42 AD19 RFU43...

  • Page 37: Lga Pads Layout

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 3.2. LGA Pads Layout Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 37 of 112...
  • Page 38 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 38 of 112...

  • Page 39: Electrical Specifications

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Electrical specifications 4.1. Absolute maximum ratings – not operational A deviation from listed below values range may harm the xE922-3GR module. Symbol Parameter Unit battery supply voltage on VBATT -0.3 +5.5 pin VBATT battery supply voltage on VBATT_PA -0.3...
  • Page 40 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 For 1.8V CMOS signals: Absolute Maximum Ratings - Not Functional xE922-3GR Parameter Input level on any -0.3V +2.16V digital pin when on Input voltage on -0.3V +2.16 V analog pins when on Operating Range - Interface levels (1.8V CMOS) Unit condition xE922-3GR...

  • Page 41: Power Supply

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Power supply 5.1. Input supply There are 2 input power supplies defined on the xE922-3GR module, V_BAT, V_BAT_PA. V_BAT_PA pin supplies transmit RF front end (RFFE) power amplifiers (PA) of the cellular network (2G/3G) connection feature of the module.

  • Page 42: Output Supply

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Both V_BAT_PA and V_BAT are protected by Zener transient voltage suppressor diodes internal the module. Although the internal transient suppressor also protects for reverse polarized input supply application, its max power dissipation is limited as well. For performance specification of this protection please consult the datasheet.

  • Page 43: Vaux_2P85V

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 5.2.1.2. VAUX_2P85V parameter symbol value unit condition Default Default value state External Cext 1000 1400 cappacitor Cappacitor R_esr 100 Hz 0.05 1 MHz…30MHz Output voltage Vreg 2.85 Configurable 2.85V 1.8/2.5/2.8/2.85V Output Ireg Current Current Imax 50% nominal...

  • Page 44: Vsim1/2

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 The datasheet of the eMCP specifies a maximum current consumption on this powersupply line of about 150mA (read operation). Care should be exercised to limit the total power consumption, to keep heat dissipation limited: Power_dissipation = (V_BAT-3.0V) x (150mA_max+I_external) 5.2.1.4.

  • Page 45: Typical System Power Consumption

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Current Pull-downr resistor Rpd DC/DC is OFF Switching F_dcdc frequency Note: 1V8_OUT is also applied internally the module feeding several I/O peripherals, memory interface and analog RF parts (depending on use case). Care should be exercised to keep external current dissipation limited in order not to exceed the maximum output current of the DC/DC regulator.
  • Page 46 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 standby Flight Mode WLAN Idle associated (3G cell registered) 2G Standby, DRX5 GSM850 GSM900 DCS1800 PCS1900 3G Standby, DRX7 Data traffic GPRS 4TX(gamma10)/1RX PS GSM850 GSM900 DCS1800 PCS1900 3G 24dBm RMC 12.2kbps Audio Playback MP3 Playback, Wired Headset, flight mode Video Playback Video Playback 720p 30fps H.264, HP level 4.0, 4Mb/s,...

  • Page 47: Rtc Backup

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Video Streaming HTML5 WLAN -H.264 -720p Video Streaming HTML5 3G -H.264 -720p chrome52 Browsing Browsing Chrome HTML5 -WLAN Browsing Chrome HTML5 -3G Imaging User mode image capture, 3G idle Video Recording, HD 720p 30fps AVC baseline 3.1, 1.5Mbps, 3G idle GNSS Tracking mode (non-assisted) : GPX Logger app (typical...
  • Page 48 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 The following table gives an overview of V_RTC minimum voltage level requirements in order to keep RTC running: condition minimum V_RTC [V] room temperature -40 to +125deg So typically at room temperature a voltage difference of 2.3V – 0.8V = 1.5V is available for buffering the RTC supply in case V_BAT is removed.

  • Page 49: Power On/Off And Reset Control

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Power ON/OFF and reset control 6.1. Power On Once power applied to the V_BAT, the power on can be triggered by four possible events: ON_OFF key event (+ application of power to system with ‘first connect’ enabled) ·...

  • Page 50: Switching On Due To Charging

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 6.1.2. Switching ON due to charging If an external charger is detected the system startup procedure begins. An external charger can be detected by LOW level detection on CHG_POK and / or CHG_INT input pins. Both pins have an internal pullup applied to V_RTC.

  • Page 51: Battery Management

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Battery management The xE922-3GR chipset supports an (optional) complete battery management solution based on external charger IC interfacing by the following dedicated charging control lines. Signal descriptions Type AN14 CHG_RST_OUT External Charger Reset AB21 CHG_INT_IN Charger IRQ...

  • Page 52: Battery Charging

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Minimize parasitic resistance in the current path by using thick copper traces between sense resistor and PCB ground and negative battery terminal respectively. The fuel gauge FG_IBATP/N signal pair should be routed as differential and isolated from aggressors (like clocks, DC/DC switching nodes) to minimize noise interference.
  • Page 53 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 The CHG_POK line (active LOW, internal pullup to always_on domain V_RTC) wakes the system once a valid input supply source is present. It has the same effect as the ON_OFF key event to initiate a power-up sequence.

  • Page 54: Battery/Charger-Less Operation

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 7.2.2. Battery/charger-less operation In case the xE922-3GR module is applied directly from a DC source supply, without battery and/or external charger IC, the charger specific interface signals should be connected as indicated in the next picture. Since VBATMEAS and POK signals are still used in the power on sequencing / boot process, it is important to have the following minimum connections implemented.

  • Page 55: Usim Interface

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 USIM interface xE922-3GR supports two external USIM interfaces (dual volt 1.8/3V) compatible with ISO 7816-3 IC Card standard. Signal descriptions Type SIM card interface 1 VSIM1 External SIM signal 1 – Power supply for the SIM 1.8 / 2.85V SIMCLK1 External SIM signal 1 –...
  • Page 56 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 NOTE FOR R1: The resistor value on SIMIO pulled up to SIMVCC should be defined accordingly in order to be compliant with 3GPP specification for USIM electrical testing. Rise/fall time of SIMIO line should not exceed 1 µs.

  • Page 57: Usb Port

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 USB port The xE922-3GR module includes a Universal Serial Bus (USB) transceiver, which operates at USB high-speed (480Mbits/sec). It can also operate with USB full-speed (12Mbits/sec) hosts. It is compliant with the USB 2.0 ‘DRD’ dual role specification, 15 endpoints, and can be used control and data transfers as well as for diagnostic monitoring and firmware update.
  • Page 58 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 At least Test point of the USB signals are required since the USB physical communication is needed in the case of SW update. Routing guide lines for the display USB2.0 interface: The next figure shows a typical signal traject with different sub trajects. Recommended routing guidelines for the whole USB signal traject : parameter guideline...
  • Page 59 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Guidelines for sub trajects: parameter module main stub Transmission line segment L1 (MS/SL) L2 (SL) L3 (MS) L4 (MS) L5(SL) Lstub Max. length [mm] 25.4 101.6 12.7 25.4 101.6 Actual xE922-3GR module signal trace (L1) implementation: signal name module trace length [mm] Number of microvias on...

  • Page 60: Display Interface

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Display interface The xE922-3GR supports a display according following 3 interface types: MIPI-DSI (4-lane, GPIO’s including tearing effect timing control) · LVDS (4-lane) · On top of this display interface the module also features backlight control (CABC input, BL feedback input, BL drive output) and I2C port to control a touch panel IC.
  • Page 61 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Recommended routing guidelines for the whole MIPI-DSI signal traject: parameter guideline Characteristic impedance (stripline / microstrip) 100 ohm differential 10%(SL) 15%(MS) Trace spacing : between differential pairs or between 5xh (SL) 7xh (MS) differential pair and other signals (h = dielectric height) Total length Min.

  • Page 62: Lvds

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Actual xE922-3GR module signal trace (L1+L2) implementation: signal name module trace length [mm] Number of microvias on the module DSI_CLKN 9.88 DSI_CLKP 9.65 DSI_DN0 7.39 DSI_DP0 7.15 DSI_DN1 9.09 DSI_DP1 9.28 DSI_DN2 8.60 DSI_DP2 8.43 DSI_DN3...
  • Page 63 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 LVDS_TCLK1N LVDS Clock Negative Analog Routing guide lines for the display LVDS interface: The next figure shows a typical signal traject with different sub trajects. Recommended routing guidelines for the whole LVDS signal traject: parameter guideline Characteristic impedance (stripline / microstrip)

  • Page 64: Backlight Control

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Guidelines for off-module sub trajects: parameter Carrier board Addon board Transmission line segment Length [mm] 82.5 (MS/SL) Max. 203.2 – (L1+L2+L3) Actual xE922-3GR module signal trace (L1+L2) implementation: signal name module trace length [mm] Number of microvias on the module LVDS_TCLK1N...

  • Page 65: Led_Cursink

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 A typical application of the backlight control is drawn in below figure . LEDDRV controls the gate of an external NFET with PWM signal. During first time period t1 the inductor L is charged via the n-channel FET closed , while during second period t2 the inductor L is discharged via the parallel LED’s.

  • Page 66: Touch Panel

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 10.5. Touch panel Signal descriptions Type Touch Screen interface AD17 TP_SDA Touch panel I2C Data CMOS 1.8V AB17 TP_SCL Touch panel I2C Clock CMOS 1.8V TP_RESET Touch panel Reset CMOS 1.8V TP_IRQ Touch panel Interrupt CMOS 1.8V A dedicated I2C bus and control lines are foreseen to interface with an external touch panel control IC.

  • Page 67: Camera Interface

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Camera interface The xE922-3GR module offers two CIF camera interfaces. MIPI CSI-2 compliant, utilizing MIPI DPHY as physical layer. Max rate of bit clock of a DPHY lane is defined as 500MHz, or equivalent datarate 1Gbps. Atom x3 chipset ISP throughput limited to max 221Mpix/sec Please consult Intel’s IBL Support website for AVL (approved vendor list), as well for recommended implementation and port assignment...
  • Page 68 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Main camera: High resolution up to 13Mpixel /15 fps · 4-lane MIPI CSI-2 · up to 550Mbps/lane data rate ( limited by ISP throughput) · Secondary camera: · Low resolution up to 5Mpixel ·...
  • Page 69 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Recommended routing guidelines for the whole MIPI-CSI-2 signal traject : parameter guideline Characteristic impedance (stripline / microstrip) 100 ohm differential 10%(SL) 15%(MS) Trace spacing : between differential pairs or between 5xh (SL) 7xh (MS) differential pair and other signals (h = dielectric height) Total length Min.
  • Page 70 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 CSI1_DP1 7.48 CSI1_DN2 7.77 CSI1_DP2 7.52 CSI1_DN3 7.31 CSI1_DP3 7.26 signal name module trace length [mm] Number of microvias on the module CSI2_CLKN 10.04 CSI2_CLKP 10.26 CSI2_DN 10.46 CSI2_DP 10.7 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved.

  • Page 71: Peripheral Interfaces

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Peripheral interfaces 12.1. The xE922-3GR offers in total four I2C bus interfaces. 1V8 IO, standard/fast mode SCLK 100 kHz/400 kHz. The below table gives an overview and indicates the assigned functions that are ‘reserved’ for each I2C bus port.

  • Page 72: Usif

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 12.2. USIF xE922-3GR offers two ‘Universal Serial Interface’ ports, configurable either as SPI or UART USIF1 :SPI (up to 48MHz) / UART · USIF2 :SPI (up to 26MHz) / UART · Signal descriptions Type USIF 1 (UART/SPI) USIF1_RXD...
  • Page 73 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Actual xE922-3GR module signal trace (L1) implementation USIF1: signal name module trace length [mm] Number of microvias on the module USIF1_SCLK 24.8 USIF1_RXD 20.8 USIF1_TXD 20.2 USIF1_CS 22.2 Actual xE922-3GR module signal trace (L1) implementation USIF2: signal name module trace length [mm] Number of microvias on...

  • Page 74: Sdmmc/Sdio

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 12.3. SDMMC/SDIO SDIO: SD 3.0, 1x 4bit, speed up to DDR50 (clk 48MHz) / SDR50 (clk 96MHz), only 1.8V supported SDMMC: SD 3.0, 1x 4bit, default mode 26MHz, including power supply VDD_SD (fixed to 2.9V) and card detect Note: In case SDMMC 1.8V support is needed, an external 3.0V voltage regulator should be added (ENABLE pin...
  • Page 75 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 A typical diagram for SDMMC card connection is shown in below figure. Series resistor R1 place holder is recommended for tuning high speed CLK signal, typ.27 Ohm. Internal regulator VDD_SD supports dual voltage level 2.9V (default)/1.8V, with current rating max 255 mA. Maximum decoupling capacitance C1 is up to 5 uF (including the internal 1uF decoupling already present).
  • Page 76 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Recommended routing guidelines for the whole SDMMC/SDIO signal traject: parameter guideline Characteristic impedance (stripline 50 ohm single ended 10%(SL) 15%(MS) microstrip) Trace spacing (h = dielectric height) 2xh (SL) 3xh (MS) Total length Min.

  • Page 77: Adc

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 signal name module trace length [mm] Number of microvias on the module SD_CLK 37.86 SD_CMD 37.26 SD_DAT0 37.79 SD_DAT1 36.54 SD_DAT2 35.72 SD_DAT3 36.49 12.4. xE922-3GR offers in total three ADC input lines: Signal descriptions Type...

  • Page 78: General Purpose I/O

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 General purpose I/O The following table gives an overview of the xE922-3GR pins that are ‘suggested’ for general purpose I/O use case: Reset Signal descriptions Type state T/PD GPIO0_EINT5 GPIO / External IRQ CMOS 1.8V GPIO / External IRQ, Used for SoC USB ID T/PD...
  • Page 79 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Each SoC pad’s characteristics are controlled by a peripheral called PCL (Port Control Logic). In the next page table a ‘complete’ overview of all PCL muxing options for ‘all DBB pins externally available’ on the xE922-3GR module LGA pinout is detailed out. In order to clarify the correspondence between the module’s pin naming and chip set supplier documentation naming convention, the DBB SoC BGA ball pin /signal names as well as xE922-3GR LGA pin number / signal names are indicated in different columns.
  • Page 80 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 80 of 112...

  • Page 81: Debug / Flash Interfaces

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Debug / flash interfaces For debugging and/or flashing FW to the xE922-3GR module, several interfaces are available. Please refer to EVB documentation for example of debug connector implementations. 14.1. USB2.0 HS This interface can be used as image flash download and debug interface (ADB debug interface) 14.2.

  • Page 82: Audio

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Audio Note: The audio interface description below explains all possible audio path routing available by the module’s LGA pin map. Currently the FW does not allow changing the preferred audio path on the fly, it is hard coded. The default audio configuration is: Audio in : analog microphone MICP/N1 ·...

  • Page 83: Analog In

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 The following figure shows a top level view of the analog Audio frontend (AFE) of xE92-3GR ABB/PMU. The IDI connects the ABB to the Audio DSP/DBB. Note: All measurements done like described in AES-17 standard method for digital audio engineering. The values included in the below tables are extracted from to the chipset datasheet.
  • Page 84 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Parameters audio ADC: Parameter Unit condition Bit width Lower limit Upper limit sample rate Parameters decimation filter Sample rate fs mode Passband Passband Stopband Stopband attenuation corner ripple 8 kHz Narrowband speech >3.4 kHz <...
  • Page 85 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 The following figure shows typical single ended connection concept for electret microphones (AC coupling value for low cut off frequency @ 300Hz): The MICP/MICN should be routed close together in order to minimize interference noise. Differential mode can be interesting when feeding the MIC input from a differential pre-amplifier.

  • Page 86: Analog Out

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Parameters VMIC_BIAS supply: Parameter Unit condition VMIC_BIAS 1.9..2.2 I_out Noise uVrms 300-3900Hz R_load kOhm PSSR 15.1.2. Analog OUT The analog audio-out consists of two DAC’s followed by post filter, and finally the output stage. The DAC is preceeded by digital interpolation filter of which oversampling ratio depends on respective sampling rate.The following block diagram explains how the output DAC signal sources can be switched to the respective output driver options.

  • Page 87: Earpiece

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Parameters interpolation filter Sample rate fs mode Passband Passband Stopband Stopband corner ripple attenuation 8 kHz Narrowband speech >3.4 kHz < 0.5dB 4.6-50 kHz 96 dB 16 kHz Wideband speech >6.8 kHz < 0.5dB 9.2-50 kHz 96 dB 32 kHz...

  • Page 88: Loudspeaker

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Parameters headset: Parameter Unit condition Lower limit Upper limit Freq response -0.5 20 dB FS ref ampl @997Hz dB FS RL=16 ohm, gain +6dB CCIR THD+N RL=16 ohm, gain +6dB, ref signal -10 dB FS Vout RL= 32 ohm, ground-centered RL= 16 ohm, ground-centered...
  • Page 89 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Parameters loudspeaker: Parameter Unit condition Lower limit Upper limit Freq response -0.5 20 dB FS ref ampl @997Hz dB FS RL=8 ohm, gain 0dB CCIR THD+N RL=8 ohm, gain 0dB, ref signal -10 dB FS Pout V_BAT=3.8V,RL= 8 ohm, 10% THD fundamental...

  • Page 90: Digital

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 15.2. Digital 15.2.1. As mentioned in the USIF part, USIF1 interface pins , on top of SPI or UART, can be configured as audio I2S port as well .The below table shows the multiplex pinout in case configured for I2S interface: USIF1-I2S pin mapping USIF1_RXD I2S1_RX...

  • Page 91: Antenna(S)

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Antenna(s) The antenna connection and board layout design are the most important parts in the full product design and they strongly reflect on the product’s overall performance. Read carefully and follow the requirements and the guidelines for a good and proper design. 16.1.

  • Page 92: Gsm/Wcdma Antenna - Pcb Line Guidelines

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 remove or install the xE922-3GR module. Antennas used for this OEM module must not exceed 3dBi gain for mobile and fixed operating configurations. 16.1.1. GSM/WCDMA Antenna – PCB line Guidelines Make sure that the transmission line’s characteristic impedance is 50ohm. ·...

  • Page 93: Wifi/Bt Antenna Requirements

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 16.2. WiFi/BT Antenna Requirements Antenna recommended specification: Frequency: 2.4-2.5GHz · Gain (peak): 2.3 dBi · VSWR : max 1.8 · Return loss : max -10 dB · Radiation : omni directional · Polarization : linear vertical ·...

  • Page 94: Combined Gnss Antenna

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 In case of an internal antenna configuration, it is important to keep the 50 ohm transmission line (TL) short to limit possible signal degradation between antenna and internal LNA amplifier. In case of an active external antenna, a bias circuit to feed the antenna integrated LNA is required.

  • Page 95: Gnss Antenna - Pcb Line Guidelines

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 16.3.4. GNSS Antenna - PCB Line Guidelines Ensure that the antenna line impedance is 50ohm. · Keep the line on the PCB as short as possible to reduce the loss. · The antenna line must have uniform characteristics, constant cross section, avoiding ·...

  • Page 96: Mounting The Module On Your Board

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Mounting the module on your board 17.1. General The xE922-3GR module is designed to be compliant with a standard lead-free SMT process 17.2. Finishing & Dimensions Board finsih : ENIG (Electroless Nickel Immersion Gold) Reproduction forbidden without written authorization from Telit Communications S.p.A.

  • Page 97: Recommended Foot Print For The Application Main Board

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 17.3. Recommended foot print for the application main board 441 pads transparant top view Dimensions are in [mm].In order to easily rework the xE922-3GR it is suggested to consider that the application has a 1.5 mm placement inhibit area around the module. It is also suggested, as a common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module.

  • Page 98: Stencil

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 NOTE: In the customer application, the region under ROUTE INHIBIT (see figure above) must be clear from signal. The five horseshoe shapes, indicated in the footprint picture above, are solder resist mask openings in the surrounding GND copper fill. They provide proper GND connection for built-in RF probes on Telit’s production test jig socket.

  • Page 99: Recommendations For Pcb Pad Dimensions (Mm)

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 17.6. Recommendations for PCB Pad Dimensions (mm) It is not recommended to place via or micro-via, which are not covered by solder resist in an area of 0.3 mm around the pads unless it carries the same signal of the pad itself (see following figure).

  • Page 100: Solder Paste

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 17.7. Solder Paste Solder Paste Lead free Sn/Ag/Cu We recommend using only “no clean” solder paste in order to avoid the cleaning of the modules after assembly. Solder Reflow 17.7.1. Recommended solder reflow profile is shown below: Reproduction forbidden without written authorization from Telit Communications S.p.A.
  • Page 101 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Profile Feature Pb-Free Assembly Average ramp-up rate (T to T 3°C/second max Preheat – Temperature Min (Tsmin) 150°C – Temperature Max (Tsmax) 200°C – Time (min to max) (ts) 60-180 seconds Tsmax to TL –...

  • Page 102: Packing System

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Packing system The Telit xE922-3GR module is packaged on trays. The tray is JEDEC compliant, injection molded antistatic Modified Polyphenylene ether (MPPO). It has good thermal characteristics and can withstand a the standard baking temperature up to 125°C, thereby avoiding handling the modules if baking is required.
  • Page 103 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 103 of 112...

  • Page 104: Tray Drawing

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 18.1. Tray Drawing Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved. Page 104 of 112...

  • Page 105: Moisture Sensitivity

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 18.2. Moisture Sensitivity The xE922-3GR is a Moisture Sensitive Device level 3, in accordance with standard IPC/JEDEC J-STD-020. Observe all of the requirements for using this kind of components. Reproduction forbidden without written authorization from Telit Communications S.p.A. - All Rights Reserved.

  • Page 106: Safety Recommendations

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Safety Recommendations READ CAREFULLY Be sure that the use of this product is allowed in your country and in the environment required. The use of this product may be dangerous and must be avoided in the following areas: Where it can interfere with other electronic devices in environments such as ·...

  • Page 107: Conformity Assessment Issues

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Conformity assessment issues 20.1. FCC/IC Regulatory notices 20.1.1. Modification statement Telit Communications S.p.A has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Telit Communications S.p.A n’approuve aucune modification apportée à...

  • Page 108: Fcc Class B Digital Device Notice

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Cet appareil est conforme aux limites d'exposition aux rayonnements de la IC pour un environnement non contrôlé. L'antenne doit être installé de façon à garder une distance minimale de 20 centimètres entre la source de rayonnements et votre corps. Gain de l'antenne doit être ci-dessous: Type d’...

  • Page 109: 1999/5/Ec Directive

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 FCC ID et l’IC du module, précédé des mots « Contient un module d'émission », du mot « Contient » ou d'une formulation similaire exprimant le même sens, comme suit: Contains FCC ID: RI7HE9223GR Contains IC: 5131A-HE9223GR CAN ICES-3 (B) / NMB-3 (B) This Class B digital apparatus complies with Canadian ICES-003.
  • Page 110 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Hawnhekk, “Telit Communications S.P.A.”, jiddikjara li dan “xE922-3GR module” jikkonforma mal-ħtiġijiet essenzjali Maltese u ma provvedimenti oħrajn relevanti li hemm fid-Dirrettiva 1999/5/EC. “Telit Communications S.P.A.” erklærer herved at utstyret “xE922-3GR module” er i samsvar med de grunnleggende Norwegian krav og øvrige relevante krav i direktiv 1999/5/EF.
  • Page 111 xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 There is no restriction for the commercialization of this device in all the countries of the European Union. Final product integrating this module must be assessed against essential requirements of the 1999/5/EC (R&TTE) Directive. It should be noted that assessment does not necessarily lead to testing.

  • Page 112: Document History

    xE922-3GR Hardware User Guide 1VV0301272 Rev.0.8 2017-01-05 Document History Revision Date Changes 2016-05-18 Draft 2016-06-03 2016-06-10 2016-07-19 2016-08-17 2016-09-29 Added typical power consumption table 2016-10-26 Update pwr consumption Update 60950 safety remarks 2017-01-05 Add Conformity Assessment Issues chapter Update on LGA pin AN8 Reproduction forbidden without written authorization from Telit Communications S.p.A.

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