Telit Wireless Solutions UE866-N3G Hardware User's Manual
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Telit Wireless Solutions UE866-N3G Hardware User's Manual

Ue866 series 3g module
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UE866 HARDWARE USER
GUIDE
UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10
1 of 70
Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved

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Summary of Contents for Telit Wireless Solutions UE866-N3G

  • Page 1 UE866 HARDWARE USER GUIDE UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 1 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...
  • Page 2 APPLICABILITY TABLE PRODUCTS UE866-N3G UE866-EU UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 2 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...
  • Page 3 DISCLAIMER LEGAL NOTICE These Specifications are general guidelines pertaining to product selection and application and may not be appropriate for your particular project. Telit (which hereinafter shall include, its agents, licensors and affiliated companies) makes no representation as to the particular products identified in this document and makes no endorsement of any product.
  • Page 4 HIGH RISK MATERIALS Components, units, or third-party products contained or used with the products described herein are NOT fault-tolerant and are NOT designed, manufactured, or intended for use as on-line control equipment in the following hazardous environments requiring fail-safe controls: the operation of Nuclear Facilities, Aircraft Navigation or Aircraft Communication Systems, Air Traffic Control, Life Support, or Weapons Systems (“High Risk Activities").

  • Page 5: Table Of Contents

    CONTENTS Introduction Scope Audience Contact Information, Support List of acronyms Text Conventions 1.6. Related Documents Overview Pins Allocation Pin-out LGA Pads Layout Power Supply Power Supply Requirements Power Consumption General Design Rules Electrical Design Guidelines +5V Source Power Supply Design Guidelines + 12V input Source Power Supply Design Guidelines Battery Source Power Supply Design Guidelines Thermal Design Guidelines...
  • Page 6 MODEM SERIAL PORT 2 (USIF1) RS232 LEVEL TRANSLATION General Purpose I/O Using a GPIO as INPUT Using a GPIO as OUTPUT Indication of network service availability SIMIN Detection External SIM Holder ADC Converter DAC Converter Enabling DAC LOW Pass filter Example RF Section Bands Variants TX Output Power...
  • Page 7 10.2 Moisture sensitivity SAFETY RECOMMANDATIONS FCC/IC Regulatory notices Document History 13.1 Revisions UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 7 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...

  • Page 8: Introduction

    INTRODUCTION Scope The aim of this document is the description of some hardware solutions useful for developing a product with the Telit UE866 module. Audience This document is intended for Telit customers, who are integrators, about to implement their applications using our UE866 modules.

  • Page 9: List Of Acronyms

    List of acronyms Acronym Description TTSC Telit Technical Support Centre Universal Serial Bus High Speed Data Terminal Equipment UMTS Universal Mobile Telecommunication System WCDMA Wideband Code Division Multiple Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access UART Universal Asynchronous Receiver Transmitter HSIC...

  • Page 10: Text Conventions

    Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction.

  • Page 11: Overview

    OVERVIEW The aim of this document is the description of some hardware solutions useful for developing a product with the Telit UE866 module. In this document all the basic functions of a mobile phone will be taken into account; for each one of them a proper hardware solution will be suggested and eventually the wrong solutions and common errors to be avoided will be evidenced.

  • Page 12: Pins Allocation

    PINS ALLOCATION Pin-out Signal Function Type Comment USB HS 2.0 COMMUNICATION PORT USB_D+ USB differential Data (+) USB_D- USB differential Data (-) Power sense for the internal USB_VBUS USB transceiver. Asynchronous Serial Port (USIF0) - Prog. / Data + HW Flow Control Output for Data carrier detect C109/DCD CMOS 1.8V...
  • Page 13 / Digital Audio Interface (WA0) GPIO02 I/O pin GPIO_02 / JDR / DVI_RX / Jammer Detect Report CMOS 1.8V / Digital Audio Interface (RX) GPIO03 GPIO I/O pin GPIO_03 / DVI_TX CMOS 1.8V / Digital Audio Interface (TX) GPIO04 Configurable GPIO GPIO_04 / DVI_CLK CMOS 1.8V Digital Audio Interface (CLK)
  • Page 14 Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED...
  • Page 15 WARNING: Reserved pins must not be connected If not used, almost all pins should be left disconnected. The only exceptions are the following pins: Signal Note VBATT VBATT_PA D1, F1, G1, D2, F2, C3, E3, F3, G3, F6, A8, G8, A11, Antenna C103/TXD If not used should be connected to a Test Point...

  • Page 16: Lga Pads Layout

    LGA Pads Layout TOP VIEW C105/RTS C106/CTS TX AUX VBATT_PA C108/DTR C109/DCD RX AUX VBATT C107/DSR C125/RING C103/TXD GPIO_06 GPIO_07 USB_VBUS DAC_OUT ADC_IN1 RESET* RESERVED C104/RXD GPIO_05 GPIO_01 GPIO_04 USB_D+ VRTC VAUX/PWR RESERVED SIMIO GPIO_02 GPIO_03 USB_D- RESERVED RESERVED RESERVED RESERVED SIMCLK SIMRST...

  • Page 17: Power Supply

    POWER SUPPLY The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performances, hence read carefully the requirements and the guidelines that will follow for a proper design. Power Supply Requirements The external power supply must be connected to VBATT &...

  • Page 18: Power Consumption

    Power Consumption Mode Average (mA) Mode Description Switched OFF 180uA Module supplied but Switched Off Idle mode (GSM/EDGE) AT+CFUN=1 Normal mode: full functionality of the module AT+CFUN=4 16.5 Module is not registered on the network AT+CFUN=5 Full functionality with power saving; DRX9 (1.3mA in case of DRX5).

  • Page 19: General Design Rules

    General Design Rules The principal guidelines for the Power Supply Design embrace three different design steps: • the electrical design • the thermal design • the PCB layout. Electrical Design Guidelines The electrical design of the power supply depends strongly from the power source where this power is drained.

  • Page 20: Input Source Power Supply Design Guidelines

    + 12V input Source Power Supply Design Guidelines • The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used. A switching power supply will be preferable because of its better efficiency.

  • Page 21: Battery Source Power Supply Design Guidelines

    Battery Source Power Supply Design Guidelines The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited for supplying the power to the Telit UE866 module. •...

  • Page 22: Thermal Design Guidelines

    Thermal Design Guidelines The thermal design for the power supply heat sink should be done with the following specifications: • Average current consumption during HSDPA transmission @PWR level max : 700 mA • Average current during idle: 1.8 mA Considering the very low current during idle, especially if Power Saving function is enabled, it is possible to consider from the thermal point of view that the device absorbs current significantly only during calls.

  • Page 23: Power Supply Pcb Layout Guidelines

    Power Supply PCB layout Guidelines As seen on the electrical design guidelines the power supply shall have a low ESR capacitor on the output to cut the current peaks on the input to protect the supply from spikes The placement of this component is crucial for the correct working of the circuitry.

  • Page 24: Rtc Bypass Out

    RTC Bypass out The VRTC pin brings out the Real Time Clock supply, which is separate from the rest of the digital part, allowing having only RTC going on when all the other parts of the device are off. To this power output a backup capacitor can be added in order to increase the RTC autonomy during power off of the battery.

  • Page 25: Digital Section

    DIGITAL SECTION Logic Levels Specification ABSOLUTE MAXIMUM RATINGS – NOT FUNCTIONAL: Parameter Input level on any digital pin (CMOS 1.8) with respect to ground -0.3V 2.1V OPERATING RANGE - INTERFACE LEVELS (1.8V CMOS): Parameter Input high level 1.5V 1.9V Input low level 0.35V Output high level 1.6V...

  • Page 26: Power On

    Power on The UE866 will automatically power on itself when VBATT & VBATT_PA are applied to the module. VAUX / PWRMON pin will be at the high logic level and the module can be considered fully operating after 5 seconds. The following flow chart shows the proper turn on procedure: “Modem ON Proc”...
  • Page 27 A flow chart showing the AT commands managing procedure is displayed below: “Start AT CMD” START Delay = 300 msec Enter AT <CR> AT answer in Disconnect PWR Supply 1 sec ? GO TO “Start AT CMD” “Modem ON Proc.” NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE866 when the...
  • Page 28 WARNING: It is recommended to power on the module only after VBATT is higher than 3.22V. The maximum rump up time for VBATT is 21mS. In case this condition it is not satisfied you could use the HW_SHUTDOWN* line to recover it. An example of this is described in the following diagram: After RESET* is released the module will automatically power on itself.

  • Page 29: Power Off

    Power off The following flowchart shows the proper Turn-off procedure: “Modem OFF Proc” AT#SYSHALT 10s Timeout Disconnect PWR Supply Delay 1.5s “Modem ON Proc.” In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE866 when the module is powered off or during an ON/OFF transition.

  • Page 30: Reset

    Reset To unconditionally reboot the UE866, the pad RESET* must be tied low for at least 200 milliseconds and then released. The maximum current that can be drained from the RESET* pad is 0,15 mA. The hardware unconditional Restart must not be used during normal operation of the device since it does not detach the device from the network.
  • Page 31 A typical circuit is the following: NOTE: In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the UE866 when the module is powered off or during an ON/OFF transition. UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 •...
  • Page 32 In the following flow chart is detailed the proper restart procedure: Modem RESET Proc. RESET* = LOW Delay = 200ms RESET* = HIGH Delay = 1s Start At CMD NOTE: Do not use any pull up resistor on the HW_SHUTDOWN* line nor any totem pole digital output.

  • Page 33: Communication Ports

    Communication ports USB 2.0 HS The UE866 includes one integrated universal serial bus (USB 2.0 HS) transceiver. The following table is listing the available signals: Signal Function Type NOTE USB_D+ USB differential Data (+) 3.3V USB_D- USB differential Data (-) 3.3V Power sense for the internal USB Accepted range:...

  • Page 34: Spi

    The UE866 Module is provided by one SPI interface. The SPI interface defines two handshake lines for flow control and mutual wake-up of the modem and the Application Processor: SRDY (slave ready) and MRDY (master ready). The AP has the master role, that is, it supplies the clock. The following table is listing the available signals: Signal Function...

  • Page 35: Serial Ports

    Serial Ports The UE866 module is provided with by 2 Asynchronous serial ports: • MODEM SERIAL PORT 1 (Main) • MODEM SERIAL PORT 2 (Auxiliary) Several configurations can be designed for the serial port on the OEM hardware, but the most common are: •...
  • Page 36 The following table shows the typical input value of internal pull-up resistors for RTS, DTR and TXD input lines and in all module states: RTS DTR TXD STATE Pull up tied to 5K to 12K Schottky diode RESET Schottky diode POWER SAVING 5K to 12K The input line ON_OFF and HW_SHDN state can be treated as in picture below...

  • Page 37: Modem Serial Port 2 (Usif1)

    MODEM SERIAL PORT 2 (USIF1) The secondary serial port on the UE866 is a CMOS1.8V with only the RX and TX signals. The signals of the UE866 serial port are: Signal Function Type NOTE Auxiliary UART (TX Data to TX_AUX CMOS 1.8V Shared with SPI_MOSI DTE)

  • Page 38: Rs232 Level Translation

    RS232 LEVEL TRANSLATION In order to interface the UE866 with a PC com port or a RS232 (EIA/TIA-232) application a level translator is required. This level translator must: • invert the electrical signal in both directions; • Change the level from 0/1.8V to +15/-15V. Actually, the RS232 UART 16450, 16550, 16650 &...

  • Page 39: General Purpose I/O

    General Purpose I/O The UE866 module is provided by a set of Configurable Digital Input / Output pins (CMOS 1.8V) Input pads can only be read; they report the digital value (high or low) present on the pad at the read time.

  • Page 40: Using A Gpio As Input

    Also the UART’s control flow pins can be usable as GPIO: Signal Input/output Default ON_OFF Reset NOTE current State state State Alternate function GPO_A 1uA/1mA INPUT C109/DCD Alternate function GPO_B 1uA/1mA INPUT C125/RING Alternate function GPO_C 1uA/1mA INPUT C107/DSR Alternate function GPI_E 1uA/1mA INPUT...

  • Page 41: Indication Of Network Service Availability

    Indication of network service availability The STAT_LED pin status shows information on the network service availability and Call status. The function is available as alternate function of GPIO_07 (to be enabled using the AT#GPIO=7,0,2 command). In the UE866 modules, the STAT_LED needs an external transistor to drive an external LED. Therefore, the status indicated in the following table is reversed with respect to the pin status.

  • Page 42: Simin Detection

    SIMIN Detection All the GPIO pins can be used as SIM DETECT input. The AT Command used to enable the function AT#SIMINCFG Use the AT command AT#SIMDET=2 to enable the SIMIN detection Use the AT command AT&W0 and AT&P0 to store the SIMIN detection in the common profile. NOTE: Don’t use the SIM IN function on the same pin where the GPIO function is enabled and vice versa!

  • Page 43: Adc Converter

    ADC Converter The UE866 is provided by one AD converter. It is able to read a voltage level in the range of 0÷1.2 volts applied on the ADC pin input, store and convert it into 10 bit word. The input line is named as ADC_IN1 and it is available on Pad F4 The following table is showing the ADC characteristics: Item Typical...

  • Page 44: Dac Converter

    DAC Converter The UE866 provides a Digital to Analog Converter. The signal (named DAC_OUT) is available on pin E4 of the UE866. The on board DAC is a 10 bit converter, able to generate an analogue value based on a specific input in the range from 0 up to 1023.

  • Page 45: Low Pass Filter Example

    LOW Pass filter Example UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 45 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...

  • Page 46: Rf Section

    RF SECTION Bands Variants The following table is listing the supported Bands: Product Supported 2G bands UE866-N3G UE866-EU GSM900, DCS1800 Product Supported 3G bands UE866-N3G FDD B2, B5 UE866-EU FDD B1, B8 TX Output Power Band Power Class GSM 900...

  • Page 47: Rx Sensitivity

    RX Sensitivity Band Sensitivity GSM 900 -109dBm DCS 1800 -110dBm FDD B1, B8 -111dBm FDD B2, B5 -110dBm UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 47 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...

  • Page 48: Antenna Requirements

    Antenna Requirements The antenna connection and board layout design are the most important aspect in the full product design as they strongly affect the product overall performances, hence read carefully and follow the requirements and the guidelines for a proper design. The antenna and antenna transmission line on PCB for a Telit UE866 device shall fulfil the following requirements: Item...
  • Page 49 Item Value Characteristic Impedance 50 ohm Max Attenuation 0,3 dB Coupling Coupling with other signals shall be avoided Cold End (Ground Plane) of antenna shall be equipotential to Ground Plane the UE866 ground pins The transmission line should be designed according to the following guidelines: •...

  • Page 50: Pcb Guidelines In Case Of Fcc Certification

    PCB Guidelines in case of FCC Certification In the case FCC certification is required for an application using UE866-N3G, according to FCC KDB 996369 for modular approval requirements, the transmission line has to be similar to that implemented on UE866 interface board and described in the following chapter.

  • Page 51: Transmission Line Measurements

    Calculated characteristic impedance is 51.6 Ω, estimated line loss is less than 0.1 dB. The line geometry is shown below: Transmission Line Measurements An HP8753E VNA (Full-2-port calibration) has been used in this measurement session. A calibrated coaxial cable has been soldered at the pad corresponding to RF output; a SMA connector has been soldered to the board in order to characterize the losses of the transmission line including the connector itself.
  • Page 52 Line input impedance (in Smith Chart format, once the line has been terminated to 50 Ω load) is shown in the following figure: Insertion Loss of G-CPW line plus SMA connector is shown below: UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 52 of 70 Reproduction forbidden without Telit Communications PLC written authorization –...
  • Page 53 UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 53 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...

  • Page 54: Antenna Installation Guidelines

    Antenna Installation Guidelines Install the antenna in a place covered by the WCDMA signal. If the device antenna is located farther than 20cm from the human body and there are no co-located transmitter then the Telit FCC/IC approvals can be re-used by the end product. If the device antenna is located closer than 20cm from the human body or there are co-located transmitter then the additional FCC/IC testing may be required for the end product (Telit FCC/IC approvals cannot be reused).

  • Page 55: Audio Section

    AUDIO SECTION Overview The UE866 is provided by one Digital Audio Interface. Digital Voice Interface The UE866 Module is provided by one DVI digital voice interface. The Signals are available on the following Pads and alternate function of the GPIOs: Signal Function DVI_WA0...

  • Page 56: Mechanical Design

    MECHANICAL DESIGN Drawing Pin A1 Lead-free Alloy: Surface finishing Ni/Au for all solder pads Dimensions in mm In case of UE866-EU shield mechanical design slightly differs from UE866 other variants, but overall dimensions are the same and there is no impact on assembling and footprint area. UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 •...

  • Page 57: Application Design

    APPLICATION DESIGN The UE866 modules have been designed in order to be compliant with a standard lead-free SMT process. Footprint In order to easily rework the UE866 is suggested to consider on the application a 1.5 mm placement inhibit area around the module. It is also suggested, as common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module.

  • Page 58: Pcb Pad Design

    PCB pad design Non solder mask defined (NSMD) type is recommended for the solder pads on the PCB. Copper Pad Solder Mask NSMD (Solder Mask Defined) (Non Solder Mask Defined) PCB pad dimensions The recommendation for the PCB pads dimensions are described in the following image (dimensions in mm) Solder resist openings UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 •...
  • Page 59 It is not recommended to place via or micro-via not covered by solder resist in an area of 0,3 mm around the pads unless it carries the same signal of the pad itself Inhibit area for micro-via (see following figure). Holes in pad are allowed only for blind holes and not for through holes.

  • Page 60: Stencil

    Stencil Stencil’s apertures layout can be the same of the recommended footprint (1:1), we suggest a thickness of stencil foil ≥ 120 µm. Solder paste Item Lead Free Solder Paste Sn/Ag/Cu We recommend using only “no clean” solder paste in order to avoid the cleaning of the modules after assembly.
  • Page 61 Profile Feature Pb-Free Assembly Average ramp-up rate (T to T 3°C/second max Preheat – Temperature Min (Tsmin) 150°C – Temperature Max (Tsmax) 200°C – Time (min to max) (ts) 60-180 seconds Tsmax to TL – Ramp-up Rate 3°C/second max Time maintained above: –...

  • Page 62: Packaging

    PACKAGING 10.1 Tray The UE866 modules are packaged on trays of 70 pieces each. These trays can be used in SMT processes for pick & place handling. UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 62 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...
  • Page 63 UE866 HARDWARE USER GUIDE 1vv0301157 Rev.12 • 2017-02-10 63 of 70 Reproduction forbidden without Telit Communications PLC written authorization – All Rights Reserved...

  • Page 64: Moisture Sensitivity

    10.2 Moisture sensitivity The UE866 is a Moisture Sensitive Device level 3, in according with standard IPC/JEDEC J-STD-020, take care all the relatives requirements for using this kind of components. Moreover, the customer has to take care of the following conditions: a) Calculated shelf life in sealed bag: 12 months at <40°C and <90% relative humidity (RH).

  • Page 65: Safety Recommandations

    SAFETY RECOMMANDATIONS READ CAREFULLY Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas: Where it can interfere with other electronic devices in environments such as hospitals, airports, aircrafts, etc Where there is risk of explosion such as gasoline stations, oil refineries, etc It is responsibility of the user to enforce the country regulation and the specific environment regulation.

  • Page 66: Fcc/Ic Regulatory Notices

    FCC/IC REGULATORY NOTICES Modification statement Telit has not approved any changes or modifications to this device by the user. Any changes or modifications could void the user’s authority to operate the equipment. Telit n’approuve aucune modification apportée à l’appareil par l’utilisateur, quelle qu’en soit la nature. Tout changement ou modification peuvent annuler le droit d’utilisation de l’appareil par l’utilisateur.
  • Page 67 Cet appareil est conforme aux limites d'exposition aux rayonnements de la IC pour un environnement non contrôlé. L'antenne doit être installé de façon à garder une distance minimale de 20 centimètres entre la source de rayonnements et votre corps. Gain de l'antenne doit être ci-dessous: Bande de fréquence Gain Band II (1900 MHz)
  • Page 68 Cet appareil est conforme aux limites d'exposition aux rayonnements de la IC pour un environnement non contrôlé. L'antenne doit être installé de façon à garder une distance minimale de 20 centimètres entre la source de rayonnements et votre corps. Gain de l'antenne doit être ci-dessous: Bande de fréquence Gain Band II (1900 MHz)

  • Page 69: Document History

    DOCUMENT HISTORY 13.1 Revisions Revision Date Changes 2014-09-19 Preliminary Version 2014-09-30 Updated Chapter 4.1; removed chapter 1.4 2014-10-03 Updated Chapter 4.1 2014-10-09 Updated Chapter 2, 3, 8.5 2015-01-08 Updated Document Template, Packaging, Flowcharts Added Safety Recommendations 2015-01-13 Added FCC / IC Regulatory notices Updated Chapter 2 Updated chapters 4.2, 4.4, 4.5, 5.2, 5.8, 12 2015-03-30...

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