Boot0 Configuration; Solder Bridges; Table 4. Solder Bridges - ST STM32F411 User Manual

Hardware layout
Oscillator from external PC14 (from external oscillator trough the pin 9 of P2 connector)
The configuration needed is:
–
–
–
4.11

BOOT0 configuration

BOOT0 is at level "0" through a pull-down R28. If you want to set BOOT0 at level "1", it can
be configured by setting a jumper between P2.21 (BOOT0) and P2.22 (V
Note: If you need to set BOOT0 at level "1" continuously, then open SB19 solder bridge to avoid a
consumption of 6 mA, while connecting pin P2.21 and P2.22 with a jumper or with a wire.
4.12

Solder bridges

Bridge
SB14,16 (X2 crystal)
SB3,5,7,9 (Default)
SB2,4,6,8 (Reserved) OFF
SB17,18 (X3 crystal)
SB1 (B2-RESET)
SB21 (B1-USER)
SB13 (NRST)
SB15 (SWO)
SB10,11 (RX,TX)
SB12 (STM_RST)
18/35
SB17closed
SB18 closed
R21 and R22 removed

Table 4. Solder bridges

(1)
State
X2, C18, C19, R24 and R25 provide a clock. 
OFF
PH0, PH1 are disconnected from P2
PH0, PH1 are connected to P2 
ON
R24, R25 and R66 must not be fitted).
ON Reserved, do not modify
Reserved, do not modify
X3, C20, C28, R21 and R22 deliver a 32 KHz clock. 
OFF
PC14, PC15 are not connected to P2.
ON PC14, PC15 are only connected to P2. Remove only R21, R22
B2 pushbutton is connected to the NRST pin of the STM32F411VET6 MCU
ON
OFF B2 pushbutton is not connected to the NRST pin of the STM32F411VET6 MCU
B1 pushbutton is connected to PA0
ON
OFF B1 pushbutton is not connected to PA0
NRST signal of the CN2 connector is connected to the NRST pin of the
ON
STM32F411VET6 MCU
NRST signal of the CN2 connector is not connected to the NRST pin of the
OFF
STM32F411VET6 MCU
SWO signal of the CN2 connector is connected to PB3
ON
OFF SWO signal is not connected
Reserved, do not modify
OFF
ON Reserved, do not modify
No incidence on STM32F103C8T6 (ST-LINK/V2) NRST signal
OFF
ON STM32F103C8T6 (ST-LINK/V2) NRST signal is connected to GND
DocID027213 Rev 1
Description
UM1842
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