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3.3 EVM Jumper Summary
Table 3-1
summarizes all of the EVM jumper functionality.
Header
J2
PVDD to IOVDD
J3
USB 3.3V
J5
Ext REF
J6
IOVDD Shunt
J7
REF EN
J8
UARTIN
J13
POL SEL
J14
Resistor Load
J17
Cap Load
J19, J20
FILT SEL
J23
Level Translator
Figure 3-2
shows the default jumper settings with the device using USB power. The EVM can be fully operated
using only the USB2ANY connector for both power and communication.
SLAU858 – NOVEMBER 2021
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Table 3-1. AFE881H1EVM Jumper Summary
Name
Short 1-2 – PVDD connected to IOVDD
Open 1-2 – PVDD, IOVDD disconnected (default)
Short 1-2 – PVDD connected to USB2ANY 3p3V (default)
Open 1-2 – PVDD disconnected from USB2ANY 3p3V
Short 3-4 – IOVDD connected to USB2ANY 3p3V (default)
Open 3-4 – IOVDD disconnected from USB2ANY 3p3V
Short 1-2 – VREFIO connected to external reference
Open 1-2 – VREFIO disconnected from external reference (default)
Short 1-2 – IOVDD connected to device (default)
Open 1-2 – IOVDD disconnected from device
Short 1-2 – REFEN connected to IOVDD (default)
Short 2-3 – REFEN connected to GND
Short 1-2 – UART_IN connected to bus transceiver (default)
Open 1-2 – UART_IN disconnected from bus transceiver
Short 1-2 – POL_SEL connected to PVDD through 100-kΩ resistor
Short 2-3 – POL_SEL connected to GND through 100-kΩ resistor (default)
Short 1-2 – VOUT connected to 10-kΩ load
Open 1-2 – VOUT no resistive load (default)
Short 1-2 – VOUT connected to 100-pF load
Open 1-2 – VOUT no capacitive load (default)
Short 1-2 – HART IN pin external filter selected
Short 2-3 – HART IN pin internal filter selected
Short 1-2 – Bus transceiver OE connected to GND (default)
Short 2-3 – Bus transceiver OE connected to IOVDD
Figure 3-2. Default Header Settings for the AFE881H1EVM
Copyright © 2021 Texas Instruments Incorporated
EVM Hardware Overview
Function
AFE881H1 Evaluation Module
7
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