Cache Memory; Main Memory - HP Net Vectra Technical Reference Manual

Switch
Processor
Frequency
1
166 MHz Closed
200 MHz Closed
1
233 MHz Closed
1
266 MHz Closed
1.
Switch settings if these processor frequencies become available (MMX technology only).

Cache Memory

The computer supports two levels of cache memory, each with a 32-byte line
width. The Level-1 (L1) cache memory is fabricated on the processor chip.
The Level-2 (L2) cache memory is a slower module on the system board.
Each acts as temporary storage for data and instructions from the main
memory. Since the system is likely to use the same, or adjacent, data several
times, it is faster to get it from the on-chip or on-board cache memory than
from the main memory.
The L1 cache memory is divided into two separate banks: an L1 I-cache for
instruction words, and an L1 D-cache for data words. Each has a capacity of
8 KB.
The L2 cache memory is controlled by the Bridge chip in the system board
chip-set. On the HP Net Vectra PC, 256 KB of direct mapped, write-back,
synchronous pipelined burst, 8.5 ns static random access memory (SRAM)
is integrated on the system board.

Main Memory

There are three main memory module sockets, arranged in three banks
(A to C). One bank is already occupied by the double interline memory
module (DIMM) that contains the 16 MB or 32 MB of memory that is
supplied with the computer.
Different banks can have different capacities (8, 16, 32 or 64 MB). The
banks should be filled in the order A, B, C. By installing a 64 MB DIMM in
every bank, the maximum capacity of 192 MB of main memory can be
attained.
Local Bus
Frequency
2
Open 66 MHz Closed
Open 66 MHz Open
Open 66 MHz Open
Open 66 MHz Closed
2 System Board
Devices on the Processor-Local Bus
Switch
3 4 5
Closed Open
Closed Open
Open Open
Open Closed
Frequency
Ratio
Processor :
Local Bus
2.5 : 1
3 : 1
3.5 : 1
4 : 1
25