Analog Devices EVAL-ADUSB2EBZ User Manual page 18

UG-477
U SB _5 V
D2
D3
E XT_5 V
2
J2
3
1
RAPC722 X
10 u F
C2 6
ADDR0/CLATCH
PWR SEL
ADP 1713 AU JZ-1 .5 -R7
1 5
IN OU T USB/EXT
3 4
E N BYP
GND
2 U 3
BATT
R2 5
10 k0
C2 3 C2 4
10 n F
BRD_ RE SE T
10 u F
C2 7
C2 9
0 .10 u F
Battery Input
1.5 V Maximum
Figure 54. EVAL-ADAU1772Z
IOVDD
R21
OPEN
SCL/CCLK
SDA/COUT
R22
OPEN
R23
10k0
Figure 55. EVAL-ADAU1772Z
L 1
2 .2 u H
ADP 1607 ACPZ -R7
5
SW
1
VIN
6
U 4
VOU T
2
E N
3
FB
R2 8
VDD SEL
162 k
S1
R2 6
137 k
SPD T
C2 8
0 .10 u F
TP2 R2 7
TP7 TP6 TP1 374 k
Evaluation Board Schematic—Power Supply
Control Port Interface
IOVDD
R14 R15
2k67 2k67
J1
1 2
R16 3 4
R17 5 6
7 8
9 10
OPEN
OPEN
HEADER_10WAY_POL
Evaluation Board Schematic—Control Port Interface
Rev. A | Page 18 of 28
Evaluation Board User Guide
IOVDD
VDD
TP4
TP3
J1 0
R1
C2 0
0 .10 u F
100 R
1V8
C3 0
C3 1
10 u F
3V3
D1
0 .10 u F
Gree n D iffu sed
Plane Decoupling
USB_5V
IOVDD
C22
0.10uF
R20
OPEN
BRD_RESET
R19
ADDR1/CDATA
OPEN
R18
10k0
C4 7
0 .10 u F
C2 1 C4 8
0 .10 u F 0 .10 u F