Mitsubishi Electric MELSECQ Series User Manual page 28

3
SPECIFICATIONS
Device
QD63P6
No.
X02 CH1
X07 CH2
X0C CH3
X11 CH4
X16 CH5
X1B CH6
X03 CH1
X08 CH2
X0D CH3
X12 CH4
X17 CH5
X1C CH6
X1F Error occurrence
3
- 6
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Signal name
Programmable
controller CPU
•Turns ON and is the device is latched when the present value A (Un\G10 and 11)/
present value B (Un\G200 and 201)
(Un\G6 and 7).
•Turns OFF by the coincidence signal reset command (Y01).
Counter value
•The counter value coincidence (X02) turns ON immediately after power-ON or
coincidence
reset of the programmable controller CPU, since the present value A (Un\G10
and 11)/present value B (Un\G200 and 201) and coincidence detection point
setting (Un\G6 and 7) are all '0'.
•For general operation, refer to Counter value large (X01) or Section 5.3.
•Turns ON when the present value A (Un\G10 and 11)/present value B (Un\G200
and 201)
Counter value small •Turns OFF when the present value A (Un\G10 and 11)/present value B (Un\G200
and 201)
•For general operation, refer to Counter value large (X01) or Section 5.3.
•Turns ON when an error occurs at any of arbitrary channels.
•To identify the channel where an error occurs, check the error code of the buffer
memory (Un\G20).
•Turns OFF when all channels are normal.
3.3 I/O Signals to the Programmable Controller CPU
3.3.2 Functions of I/O signals
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Table 3.5 I/O signals (Continued)
Coincidence detection point setting (Un\G6 and 7).
Coincidence detection point setting (Un\G6 and 7).
CH1 Error reset command
(Un/G21)
CH1 Error code
0
(Un/G20)
CH2 Error code
(Un/G50)
CH3 to 6 Error code
Error occurrence
(X1F)
* Assumed that the errors have been reset with the error reset
command of each channel.
Description
Coincidence detection point setting
Performed by the QD63P6.
0 1
100 0
0 100 0*
0 100
ON
OFF
0
0*