Renesas Renasas Single-Chip Microcomputer SH7086 User Manual page 24

2
Figure2.3.2 shows an example of SDRAM single read/write timing for operation with the SH7086 Bus clock at
40MHz.
tcyc
Tr Trw
(25ns)
ACT DESEL
CKIO
CKE
tCSD
tSI
CS3
tRASD
tSI
RASL
tRASD
tHI
CASL
RDWR
tDQMD
tSI
DQMUU-LL
tAD1
MA0-9,11
tAD1
MA10
tAD1
BA0-1
D0-31
Rev.1.0 Feb 06. 2007
REJ10J0916-0100
SDRAM SINGLE READ
tRC
tRCD
tRAS
Trw Tc1 Td1
Tcw Tde
DESEL READA DESEL DESEL DESEL
tCSD
tHI
tCASD
tSI
tCASD
tHI
tDQMD
tHI
tAD1
tSI
tAD1
tHI
tRDS2
tRDH2
tAC tOH
Data
Figure2.3.2 Example of SDRAM Single Read/Write Timing
tRCD
Tap2 Tr Trw1 Trw2
Tap1
DESEL DESEL ACT DESEL DESEL
tCSD
tSI
tRASD
tSI
tRASD
tHI
tDQMD
tSI
tAD1
Functional Overview
2.3 Memory
SDRAM SINGLE WRITE
tRC
tRAS
Tc1 Trwl1 Trwl2 Tap1 Tap2
WRITA DESEL DESEL DESEL DESEL
tHI
tCSD
tCASD
tSI
tCASD
tHI
tRWD
tSI
tRWD
tHI
tDQMD
tHI
tAD1
tSI
tAD1
tHI
tWDD2
tSI
tWDH2
tHI
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