AIC Vela User Manual
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AIC Vela User Manual

Server motherboard
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Vela
Server Motherboard
User's Manual
UM_Vela_v1.4_091021

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  • Page 1 Vela Server Motherboard User's Manual UM_Vela_v1.4_091021...

  • Page 2: Table Of Contents

    Table of Contents Preface �������������������������������������������������������������������������������������������������������� i Safety Instructions �������������������������������������������������������������������������������������� ii About This Manual ������������������������������������������������������������������������������������� iii Chapter 1� Product Features ���������������������������������������������������������������������� 1 1�1 Component ��������������������������������������������������������������������������������������� 1 1�2 Specifications ����������������������������������������������������������������������������������� 2 1�3 Feature ��������������������������������������������������������������������������������������������� 3 Chapter 2� Hardware Setup ������������������������������������������������������������������������ 4 2�1 Central Processing Unit Setup ���������������������������������������������������������� 4 2.1.1 Processor Installation ..................
  • Page 3 4.4.11 H2O Event Log Config Manager ..............45 4.4.12 H2oUve Configuration ..................46 4�5 Security ������������������������������������������������������������������������������������������ 47 4.5.1 Security ....................... 47 4�6 Power ��������������������������������������������������������������������������������������������� 48 4.6.1 Power ........................48 4�7 Boot ������������������������������������������������������������������������������������������������ 49 4.7.1 Boot ........................49 4�8 Exit ������������������������������������������������������������������������������������������������� 51 4.8.1 Exit........................51 Chapter 5�...
  • Page 4 Document Release History Release Date Version Update Content September User's Manual release to public. 2019 November Specification update. 2019 January Manual cover update. 2021 March Connector update. 2021 September BMC update 2021...
  • Page 5 Copyright © 2019 AIC®, Inc� All Rights Reserved� This document contains proprietary information about AIC® products and is not to be disclosed or used except in accordance with applicable agreements.

  • Page 6: Preface

    Disclaimer AIC® shall not be liable for technical or editorial errors or omissions contained herein. The information provided is provided "as is" without warranty of any kind. To the extent permitted by law, neither AIC®...

  • Page 7: Safety Instructions

    Safety Instructions When installing, operating, or performing maintenance on this equipment, the following safety precautions should always be taken into account in order to reduce the risk of fire, electric shock, and personal injury. Carefully read the safety instructions below before using this product. •...

  • Page 8: About This Manual

    This document pellucidly presents a brief overview of the product design, device installation, and firmware settings for the Vela motherboard. For the latest version of this user's manual, please refer to the AIC website: https://www.aicipc.com/en/productdetail/51202.

  • Page 9: Chapter 1� Product Features

    Chapter 1� Product Features This section describes the hardware specifications and features of the Vela motherboard. The fundamental components of the Vela severboard are provided below. 1�1 Component Vela Serverboard PCIe Gen3 x16 8 x SATA3 Intel PCH (from CPU0)

  • Page 10: 1�2 Specifications

    Chapter 1. Product Features 1�2 Specifications Intel® Xeon® Scalable Processors Intel ® Lewisburg PCH on-chip solution Processor (Skylake/Cascade Lake/Cascade Lake Refresh) • 2 x SATA 6.0 Gb/s (by 2 x SATA 7 pin) Support SATA • 8 x SATA 6.0 Gb/s by edge slot for extension 240W CPU TDP Aspeed AST2500 Advanced PCIe Graphics &...

  • Page 11: 1�3 Feature

    Featured with ground breaking technologies including Intel® Next Generation Microarchitecture and Instruction Set (AVX-512, VMD, QAT - optional by PCH SKU), Speed Shift Technology, UPI link speeds up to 10.4GT/s, the Vela server board enable next gener- ation server solutions with an incredible leap in performance.

  • Page 12: Chapter 2� Hardware Setup

    Chapter 2� Hardware Setup This chapter provides the graphic detail and basic instruction for hardware installation. Turn off the system and unplug all peripheral devices before proceeding. 2�1 Central Processing Unit Setup The serverboard supports dual Xeon scalable processors and Socket P0 (LGA-3647). 2�1�1 Processor Installation To ensure a safe and easy setup, you need to prepare before installation: ...
  • Page 13 Chapter 2. Hardware Setup Processor Socket Assembly: The server board includes two processor sockets (LGA-3647), supports one or two of the Intel® Xeon® Processor Scalable Family and has a Thermal Design Power (TDP) of up to 165W on selected models. PHM (Processor Heatsink Module) Component: Non Frabic Processor...
  • Page 14 Chapter 2. Hardware Setup The PHM sits level with the processor socket assembly. The PHM is NOT installed properly if it does not sit level with the processor socket assembly. Once the PHM is seated over the processor socket assembly, the four heat sink torque screws must be tightened in order as shown below.

  • Page 15: 2�2 System Memory

    Chapter 2. Hardware Setup 2�2 System Memory 2�2�1 Placement The DIMMs are displayed on the Vela board as JDIMMC0/ JDIMMB0/JDIMMA0/JDIMMD0/ JDIMME1/ JDIMME0/JDIMMF1/ JDIMMF0/JDIMML0/JDIMMK0/ JDIMMK1/JDIMMJ0/JDIMMJ1/ JDIMMG0/JDIMMH0/JDIMMI0. To ensure satisfactory performance, you need to:  Verify the DIMM type: This product supports DDR4 RDIMM/LRDIMM with EEC (Error Correction Code).

  • Page 16: Dimm Population

    Chapter 2. Hardware Setup 2�2�2 DIMM Population JDIMMF0 JDIMMI0 JDIMMF1 JDIMMH0 JDIMME0 JDIMMG0 JDIMME1 JDIMMD0 DIMM Number DIMM Arrangement CPU1 CPU0 CPU1 2 DIMMs CPU0 JDIMMC0 JDIMMI0 JDIMMJ1 JDIMMJ0 JDIMMA0 JDIMMK1 JDIMMB0 JDIMMK0 JDIMMC0 JDIMML0 JDIMMF0 JDIMMI0 JDIMMF1 JDIMMH0 JDIMME0 JDIMMG0 JDIMME1 JDIMMD0...
  • Page 17 Chapter 2. Hardware Setup JDIMMF0 JDIMMI0 JDIMMF1 JDIMMH0 JDIMME0 JDIMMG0 JDIMME1 DIMM Number DIMM Arrangement JDIMMD0 CPU0 CPU1 JDIMMC0 JDIMMI0 CPU1 JDIMMB0 JDIMMH0 10 DIMMs CPU0 JDIMMA0 JDIMMG0 JDIMMF0 JDIMML0 JDIMME0 JDIMMK0 JDIMMJ1 JDIMMJ0 JDIMMA0 JDIMMK1 JDIMMB0 JDIMMK0 JDIMML0 JDIMMC0 JDIMMF0 JDIMMI0 JDIMMF1...

  • Page 18: Dcpmm Dimm Population

    Chapter 2. Hardware Setup 2�2�3 DCPMM DIMM Population CPU0 DIMM JDIMMF0 JDIMMF1 JDIMME0 JDIMME1 JDIMMD0 JDIMMA0 JDIMMB0 JDIMMC0 App Direct DCPMM DRAM1 DCPMM DRAM1 DRAM1 DCPMM DRAM1 DRAM1 Mode Memory DCPMM DRAM2 DCPMM DRAM2 DRAM2 DCPMM DRAM2 DRAM2 Mode Mixed Memory DCPMM DRAM3...

  • Page 19: Installation

    Chapter 2. Hardware Setup 2�2�4 Installation Step 1 Unlock the DIMM socket by pressing the retaining clips outward. Step 2 Insert the memory module into the slot. Make sure that the DIMM notch is accurately positioned. DIMM notch Step 3 Close the retaining clips to complete installation.

  • Page 20: Chapter 3� Motherboard Settings

    Chapter 3� Motherboard Settings This section provides illustrations that display the internal jumpers, connectors, and system LED indicators on the Vela motherboard. The motherboard layout and essential connectors are listed below for your reference. 3�1 Block Diagram...

  • Page 21: 3�2 Content List

    Chapter 3. Motherboard Settings 3�2 Content List Connector and Header Placement Connector and Header Placement 1 VGA Connector JVGA_INT 17 Rack Connector JRACK OCP Mezzaine Power Supply Connector CN1~3 JPWR1 Connector (2 x 4 pin) PCIE1 3b PCIe Connector 19 LAN Header JLAN2 PCIE2 JCOM1...

  • Page 22: 3�3 Placement

    Chapter 3. Motherboard Settings 3�3 Placement CPU0 CPU0 CPU1 CPU1...

  • Page 23: 3�4 Connector And Jumper

    Chapter 3. Motherboard Settings 3�4 Connector and Jumper 3�4�1 Connector 1 VGA Connector (JVGA_INT) GND 1 2 DACROA VGA abbreviates for Video Graphics Array. DACGOA 3 4 N.C. This is a standard 15-pin D-sub connector DDC_DATAO 5 6 GND used for video output. GND 7 8 DACBOA N.C.
  • Page 24 Chapter 3. Motherboard Settings 7a BMC I C Header (JBMC_I2C1) C abbreviates for Inter-Integrated Circuit. 1 I2C10SCL This 3-pin header is an I C bus that provides a 2 I2C10SDA interconnection between the BMC and chassis 3 GND devices. 7b IPMB Header (JBMC_I2C2) 1 I2C1SDA IPMB abbreviates for Intelligent Platform Management Bus.
  • Page 25 Chapter 3. Motherboard Settings 15 Power Supply Connector (J13) This 5-pin connector provides the motherboard 1 +5V_AUX with power. 2 +5V_AUX 3 ATX_GD 4 PS_ON# 5 GND 16 Power Supply Connector (JPWR2) This 14-pin connector provides the GND 1 8 +12V motherboard with power.
  • Page 26 Chapter 3. Motherboard Settings 26 Front I/O Header (JUSB_INT1) This is a 11-pin front I/O header. +5V_USB23 1 20 KEY (no pin) PCH_FP_USB3_RX_N2 2 19 +5V_USB23 10 11 PCH_FP_USB3_RX_P2 3 18 PCH_FP_USB3_RX_N3 GND 4 17 PCH_FP_USB3_RX_P3 PCH_FP_USB3_TX_N2 5 16 GND PCH_FP_USB3_TX_P2 6 15 PCH_FP_USB3_TX_N3 GND 7...

  • Page 27: Jumper

    Chapter 3. Motherboard Settings 3�4�2 Jumper A NCSI_RXER (J5) Setting Short Enable Open Disable Default B BMC Debug port Configurations (J9) Setting Short Disable Open BMC Debug port Default C Top Swap Override Jumper (J8) Setting Enable Top swap Short mode Disable Top Open...
  • Page 28 Chapter 3. Motherboard Settings H Power Good Lock Jumper (JPG_LOCK) JPG_LOCK Setting Short Enable Open Disable Default I Flash Descriptor Security verride Jumper (J4) Setting Flash security Short override Open Disable Default J BMC Reset Jumper (JBMC_RST) JBMC_RST Setting Short Reset BMC Open Normal...

  • Page 29: Led Indicator

    Chapter 3. Motherboard Settings 3�4�3 LED Indicator Green (Blinking) BMC activity is detected. BMC Heart Beat BMC is not active. Green System power good is ready. SYS PG LED S y s t e m p o w e r g o o d i s n o t ready.

  • Page 30: Chapter 4� Bios Configuration Settings

    Chapter 4� BIOS Configuration Settings This chapter demonstrates how to configure the UEFI BIOS settings in your system device. You can enter the BIOS screen during system startup. To enter BIOS configuration settings, • Press Esc key during the Power-On-Self-Test (POST) To enter BIOS after POST, you have to restart the system by using one of the three methods: •...

  • Page 31: 4�2 Bios Setup

    Chapter 4. BIOS Configuration Settings 4�2 BIOS Setup 4�2�1 Menu Press  and  to select the options of the menu bar. Press Enter to access the option screen. Menu Description Main Displays basic system information and date & time. Advanced Allows configuration of advanced system settings.
  • Page 32 Chapter 4. BIOS Configuration Settings  There will be a message “Entering SETUP” displayed on the diagnostics screen.  Identify the BIOS version. NOTE For the official released version, the last digit of the BIOS version must end in a “0.“ ...

  • Page 33: Update

    Chapter 4. BIOS Configuration Settings 4�2�3 Update To identify the latest BIOS version, please check the BIOS setup. Update BIOS by INSYDE H2OFFT-D utility under DOS environment If you need to update Flash in the DOS environment, please use H2OFFT-D utility. To use this utility, you must include the flash.bat , H2OFFT-D.exe, and bin file in the same folder.

  • Page 34: Dcpmm Setup

    Chapter 4. BIOS Configuration Settings 4�2�4 DCPMM Setup  Refer to section 4.2.2 step 1 and 2 to enter the Front Page menu.  Enter the option "Device Management."  In "Device Management" page, enter "Intel(R) Optane(TM) DC Persistent Memory Configuration"...
  • Page 35 Chapter 4. BIOS Configuration Settings Intel(R) Optane(TM) DC Persistent Memory Configuration • DIMMs • Regions • Namespaces...
  • Page 36 Chapter 4. BIOS Configuration Settings • Total Capacity • Diagnostics • Preferences...

  • Page 37: 4�3 Main

    Chapter 4. BIOS Configuration Settings 4�3 Main 4�3�1 Main Main System time Configures the current time. System date Configures the current date.

  • Page 38: 4�4 Advanced

    Chapter 4. BIOS Configuration Settings 4�4 Advanced 4.4.1 Peripheral Configuration Peripheral Configuration Enables/disables SR-IOV function if PCIe Add-in Card Support. PCIe SR-IOV [Enable] Disable Enables/disables ARI Capability. PCIe ARI Enable [Disable] Enables/disables the ARI Forward. ARI Forward Enable [Disable] Enables/disables setting to reduce EMI. Spread Spectrum Enable [Disable]...

  • Page 39: Oemboard Function

    Chapter 4. BIOS Configuration Settings 4�4�3 OEMBoard Function OEMBoard Function Receives data from BMC FRU and updates. SMBIOS Updated SMBIOS Updated [Auto] By Utility Write SMBIOS to BMC for RedFish SMBIOS TO BMC Write SMBIOS to BMC Redfish [Enable] Disable Enables/disables Halt on error function.
  • Page 40 Chapter 4. BIOS Configuration Settings Configures the UPI link speed as either Link Speed the POR speed (Fast) or default speed (Slow) Mode Slow [Fast] Allows for selecting the UPI Link Frequency. Link Frequency [Auto] 9.6Gb/s Select Use Per Link 10.4Gb/s Setting UPI General...
  • Page 41 Chapter 4. BIOS Configuration Settings Configures whether 1LM or 2LM memory mode Volatile Memory should be enabled. Mode [Auto] App Direct Configures App Direct cache. cache Auto Enable [Disable] Configures eADR support. eADR Support Auto Enable [Disable] Configures the 1LM memory interleave granularity. 1LM Memory Interleave 256B Target,...
  • Page 42 Chapter 4. BIOS Configuration Settings Enables/disables NNGN Factory NGN Factory Reset/Clear. Reset/Clear Enable [Disable] Configures the number of average Average Power power budget. Budget Min=10000, Max=18000, [15000] Configures Publish ARD capability Publish ARS setting. capability [Auto] Enable Disable Configures NGN CMD Time. NGN CMD Time [Auto]...
  • Page 43 Chapter 4. BIOS Configuration Settings Enables/disables to load the NGN DIMM Load NGN DIMM Management Drivers for NVMDIMMs(install the gNfitBindingProtocolGuid). Management Drivers [Auto] Enable Disable Sets the memory interleaving mode. Memory 2-way Node 4-way Node Interleaving [Auto] NUMA Interleave Interleave Enables/disables Lock NGN CSRs.
  • Page 44 Chapter 4. BIOS Configuration Settings Enables/disables the allocation of 64-bit resources for PCI. PCI 64-Bit Resource Allocation [Enable] Disable Assume IIO is strapped for Wait-for-BIOS because straps are PCIe Train by BIOS unreliable in A-0 Silicon. [Yes] Enables/disables PCIe Hot Plug globally. PCIe Hot Plug Auto Manual...
  • Page 45 Chapter 4. BIOS Configuration Settings Intel® VMD Enables/disables Intel® Volume for Volume Management Device Technology Management in this Stack. Device for PStack0~ Enable [Disable] PStack2 Enables/dsable Intel® Volume VMD port Management Device Technology 1A~1D/ on specific root port. 2A~2D/ 3A~3D Enable [Disable] Enables/disables Hot Plug for...
  • Page 46 Chapter 4. BIOS Configuration Settings Configures the performance state that the BIOS will Boot set before OS hand off. performance [Max Set by Intel Node mode Max Efficient Performance] Manager Energy Efficient Turbo Disable, MSR 0x1FC [19] Energy Efficient Turbo [Enable] Disable Enables/disables processor Turbo Mode (requires...
  • Page 47 Chapter 4. BIOS Configuration Settings Enables/disables to shut down MDLL during SR. MDLL Off [Auto] Enable Disable Snoop Latency override Control. Snoop Latency Override Enable [Disable] Control to ignore PCIe LTR, and Force Snoop force the Snoop Latency value. Latency Override Enable [Disable] Override Value is multiplied by this...

  • Page 48: Me Configuration

    Chapter 4. BIOS Configuration Settings 4.4.6 ME Configuration ME Configuration The altitude of the platform location above the see level, expressed in meters. The hex number is decoded as 2's complement signed Altitude integer. Provide the 80000000 value if the altitude is unknown.
  • Page 49 Chapter 4. BIOS Configuration Settings Enables overriding the boot mode requested in NMFS register. Boot Mode Override None Enables overriding the boot mode requested in NMFS register. Boot Mode [Performance Optimized] Power Optimized The number of cores to disable instead of the number requested in NMFS register.

  • Page 50: Pch Configuration

    Chapter 4. BIOS Configuration Settings 4.4.7 PCH Configuration PCH Configuration Configures S0/S5 for ACPI state after a G3. PCH Devices PCH state after G3 [S5] Last State Enables/disables SATA Controller. SATA Controller [Enable] Disable Identifies the SATA port is connected to Solid State Drive or Hard Disk Drive.

  • Page 51: H2O Ipmi Configuration

    Chapter 4. BIOS Configuration Settings Enables/disables support for XHCI Wake on USB on connect/ XHCI Wake On Usb disconnect. Enable Enable [Disable] USB Configuration Place XHCI BAR Enable to work around WS2K12 KDUSB 64-bit BAR issue. below 4GB Enable [Disable] Enables/disables Automatic DIMM Refresh (ADR).

  • Page 52: Apei Configuration

    Chapter 4. BIOS Configuration Settings Configures LAN port. LAN Port Configuration [Dedicated] Shared Configures to configure LAN channel parameters. LAN Channel Number Min=0, Max=15, [1] DHCP: BMC IPv4 settings will be configured automatically by DHCP. BMC Configuration IPv4 Source Static: BMC IPv4 settings will be configured manually. Static [DHCP] Enables/disables IPv6 internet protocol support.

  • Page 53: H2O Event Log Config Manager

    Chapter 4. BIOS Configuration Settings Enables/disables Auto Refresh. Auto Refresh Console Serial [Enable] Disable Redirection Auto adjust Enables/disables Auto adjust Terminal resolution. Setup Terminal [Enable] Disable resolution 4.4.11 H2O Event Log Config Manager H2O Event Log Config Manager Enables/disables Log Event to All, BIOS, BMC SEL, Memory.

  • Page 54: H2Ouve Configuration

    Chapter 4. BIOS Configuration Settings Enables/disables DEBUG_GCD. DEBUG_GCD Enable [Disable] Enables/disables DEBUG_CACHE. DEBUG_CACHE Enable [Disable] Enables/disables DEBUG_ EFI DEBUG DEBUG_ VERBOSE. Message VERBOSE Enable [Disable] Configuration Enables/disables DEBUG_ERROR. DEBUG_ERROR Enable [Disable] Enables/disables EFI DEBUG Serial Debug Message EFI DEBUG Configuration Pages Message Level.

  • Page 55: 4�5 Security

    Chapter 4. BIOS Configuration Settings 4�5 Security 4�5�1 Security Security Current TPM Device: TPM1.2, or TPM2.0. Current TPM Device Not Detected TPM 1.2 [TPM 2.0] Confirgures the value of TPM Active PCR Hash Algorithm. TPM Active PCR Hash Algorithm [SHA1, SHA256] TPM Hardware Confirgures the value of TPM Hardware Supported Hash Algorithm.

  • Page 56: 4�6 Power

    Chapter 4. BIOS Configuration Settings 4�6 Power 4�6�1 Power Power Determines the action taken when the system power is off and a PCI Power Management Enable wake up event occurs. Wake on PME Enable [Disable]...

  • Page 57: 4�7 Boot

    Chapter 4. BIOS Configuration Settings 4�7 Boot 4�7�1 Boot Boot Configures boot type to Dual type, Legacy type or UEFI type. Boot Type [Dual Boot Type] Legacy Boot Type UEFI Boot Type Allows InsydeH2O to skip certain tests while booting. This will decrease the time needed to boot the system.
  • Page 58 Chapter 4. BIOS Configuration Settings Enable: if boot to default device fail, it will directly try to boot next device. Automatic Failover Disable: if boot to default device fail, it will pop warning message then go into firmware UI. [Enable] Disable Configures Normal Boot Option Priority or Advance Boot Option Priority.

  • Page 59: 4�8 Exit

    Chapter 4. BIOS Configuration Settings 4�8 Exit 4�8�1 Exit Exit Exit Saving Changes Exit system setup and save your changes. Save Change Without Exit Save your changes without exiting the system. Exit Discarding Changes Discard your changes when existing the system. Load Optimal Defaults Load optimal default items.

  • Page 60: Chapter 5� Technical Support

    Boulvard Suite 404 Fremont, CA 94539, United States Tel: +1-510-573-6730 Sales Email: sales@aicipc�com Support Email: support@aicipc�com For additional technical support or questions about trouble shooting, please contact the AIC® representative nearest to you or visit our AIC® website for more information. AIC® website: https://www.aicipc.com/en/faq.

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