Silicon Laboratories Si5-EVB Series Manual page 5

3.3. Si5xx-EVB Voltage Control Signal
An external voltage control signal may be applied to the control voltage modulation input at the J12 header (VC).
This voltage supplies the control voltage or voltage modulation input to the DUT. See Section 3.2 on how to
configure the jumpers and VC enable resistors (R6 and R7).
3.4. Output Terminations
The Si5xx-EVB can support four different output formats: CMOS, LVPECL, LVDS, and HCSL. There are output
resistors that are needed to accompany each format. Table 3 shows which resistors are needed for each output:
Output R2
Format
CMOS NP
LVPECL 0
LVDS NP
HCSL NP
Table 3. Output Termination Installation Definition
R12 R8 R1
NP NP NP
0 NP NP
NP NP NP
NP NP NP
R11 R3
NP 82
NP 130
NP 82
NP 82
Rev. 0.1
Si5xx-EVB
R13 C1 C7
82 100N 100N
130 NP NP
82 100N 100N
82 100N 100N
5