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71M6515H Demo Board User's Manual
71M6515H Demo Board
USER'S MANUAL
12/5/2005 2:06 PM
Revision 2.0
TERIDIAN Semiconductor Corporation
6440 Oak Canyon Rd.
Irvine, CA 92618-5201
Phone: (714) 508-8800 ▪ Fax: (714) 508-8878
http://www.teridian.com/
meter.support@teridian.com
Revision 2.0
1 of 66
© Copyright 2005 TERIDIAN Semiconductor Corporation

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  • Page 1 71M6515H Demo Board User’s Manual 71M6515H Demo Board USER’S MANUAL 12/5/2005 2:06 PM Revision 2.0 TERIDIAN Semiconductor Corporation 6440 Oak Canyon Rd. Irvine, CA 92618-5201 Phone: (714) 508-8800 ▪ Fax: (714) 508-8878 http://www.teridian.com/ meter.support@teridian.com Revision 2.0 1 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 2 71M6515H Demo Board User’s Manual TERIDIAN Semiconductor Corporation makes no warranty for the use of its products, other than expressly contained in the Company’s warranty detailed in the TERIDIAN Semiconductor Corporation standard Terms and Conditions. The company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein.
  • Page 3 71M6515H Demo Board User’s Manual 71M6515H 3-Phase Power Meter AFE IC DEMO BOARD USER’S MANUAL Revision 2.0 3 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 4: Table Of Contents

    71M6515H Demo Board User’s Manual Table of Contents GETTING STARTED ............................7 General................................7 Safety and ESD Notes............................7 Demo Kit Contents ............................7 Compatibility Statement ........................... 7 Suggested Equipment not included ........................ 8 Demo Board Test Setup............................ 8 1.6.1 Power Supply Setup.............................
  • Page 5 List of Figures Figure 1-1: TERIDIAN 71M6515H Demo and Debug Boards: Basic Connections............8 Figure 1-2: Block diagram for the TERIDIAN 71M6515H Demonstration Meter with Debug Board ......9 Figure 1-3: Control Program Icon..........................10 Figure 1-4: Host GUI Window w/ Functional Groups (Areas) Marked and Numbered ..........12 Figure 2-1: Phase Angle Definitions..........................
  • Page 6 Table 1-2: Straight cable connections .......................... 10 Table 1-3: Null-modem cable connections ........................10 Table 3-1: 71M6515H Demo Board Description: 1/3 ....................41 Table 3-2: 71M6515H Demo Board Description: 2/3 ....................42 Table 3-3: 71M6515H Demo Board Description: 3/3 ....................43 Table 3-4: JP6 Pin Description.............................
  • Page 7: Getting Started

    71M6515H IC for 3-phase electronic power metering applications. It incorporates a 71M6515H integrated circuit, peripheral circuitry such an on-board power supply as well as a companion Debug Board that allows a connection to a PC running Windows® 2000/XP through a RS232 port. The demo board allows the evaluation of the 71M6515H power meter controller chip for measurement accuracy and overall system use.
  • Page 8: Suggested Equipment Not Included

    Figure 1-1: TERIDIAN 71M6515H Demo and Debug Boards: Basic Connections The 71M6515H demo board system is shown in Figure 1-2. It consists of a stand-alone rectangular meter Demo Board and an optional Debug Board (most Debug Boards are partially assembled and have less components than shown in Figure 1-2).
  • Page 9: Power Supply Setup

    PULSE_INIT V5_NI GND_DBG JP21 Figure 1-2: Block diagram for the TERIDIAN 71M6515H Demonstration Meter with Debug Board Note: All input signals are referenced to the V3P3 (3.3V power supply to the chip). 1.6.1 POWER SUPPLY SETUP There are several choices for meter power supply: •...
  • Page 10: Serial Connection Setup

    If xxx = 192, the program will operate at 19.2kb/s, if xxx = 384, the program will operate at 38.4kb/s (UART speed when communicating with the 71M6515H). The number substituted for y states the COM port number that the program is using for communicating with the host.
  • Page 11: Using The Demo Board

    Do not press the ALT key on the keyboard! USING THE DEMO BOARD The 71M6515H Demo Board is a ready-to-use meter with a preprogrammed scaling factor Kh of 3.2 Wh/pulse. In order to be used with a calibrated load or a meter calibration system, the board should be connected to the AC power source using the spade terminals on the bottom of the board.
  • Page 12: Gui Window - Overview

    71M6515H Demo Board User’s Manual 1.8.3 GUI WINDOW - OVERVIEW Figure 1-4: Host GUI Window w/ Functional Groups (Areas) Marked and Numbered 1.8.4 GUI WINDOW – DISPLAY AND CONTROL FIELDS The PMTEST (GUI) window, as shown in Figure 1-4, contains a number of major blocks or areas (Pulse Source Select, Config, Status/Mask, Calibration Constants, Temperature Compensation, Real-Time Monitor, Digital I/O, Thresholds and Operating Time).
  • Page 13 71M6515H Demo Board User’s Manual • Display fields: Gray rectangular fields that indicate settings, measurements etc. of the 6515H chip. These fields cannot be edited by the user. • List fields: Entry fields that allow selection from the pre-determined list of choices once the down- pointing arrow is pressed (“pull-down”...
  • Page 14: Gui Window Control And Display Fields - Detailed Description

    71M6515H Demo Board User’s Manual 1.8.5 GUI WINDOW CONTROL AND DISPLAY FIELDS – DETAILED DESCRIPTION Energy, Voltage/Current and Phase Area (1): This area is in the upper left corner of the GUI window and contains a number of display fields arranged in columns.
  • Page 15 71M6515H Demo Board User’s Manual Calibration Constants Area (2): This area is on the left side of the GUI window and contains three entry fields for each phase. The function depends on the selected CE image (CT/Shunt or Rogowski sensor):...
  • Page 16 71M6515H Demo Board User’s Manual Rogowski Calibration Area (4): This area consists of two vertical columns of entry fields in the lower left side of the window. The coefficients are only active when the Rogowski image is selected for the CE.
  • Page 17 71M6515H Demo Board User’s Manual External Pulse Control Area (7): This area consists of a vertical column of combined display/entry fields to the right of the Pulse Count area. A field can be made and entry field by selecting “External” for the corresponding pulse source in the Pulse Source Selection area.
  • Page 18 71M6515H Demo Board User’s Manual System Constants Area (9): This area consists of two entry fields to the right of the Temperature Compensation area. Entries in these fields determine the system parameters of the Demo Board. GUI Element Default Function...
  • Page 19 0x00 Fourth CE data memory location to be monitored. Note: Using the RTM interface requires special external hardware. Contact TERIDIAN for details. QUANT Area (12): This area consists of three entry fields that can be used to eliminate non-linearity at low currents caused by truncation noise.
  • Page 20 71M6515H Demo Board User’s Manual Digital I/O Area (14): This area consists of three entry fields below the Real-Time Monitor area. The entries determine the configuration and settings of the eight DIO pins (D0 to D7). GUI Element Default Function...
  • Page 21 TMUX 3 Square The value for TMUX determines the source selected for the buttons and (GND) TMUX output pin on the 71M6515H. The value can be List field selected with the three buttons. Freq Source 2 Square The phase to be used for measuring the signal frequency can buttons and be selected with the two buttons as a binary word.
  • Page 22 Square This button enables temperature compensation by the host. If button the bit associated with DEFAULT PPM is 0, the 71M6515H internally controls the temperature compensation based on the stored VREF characterization values. When DEFAULT PPM is 0, the host may write values into the PPMC and PPMC2 fields to influence temperature compensation.
  • Page 23 71M6515H Demo Board User’s Manual GUI Element Default Function (Label) BOOTUP BOOTUP bit. SAG A sag A bit for phase A. SAG B sag B bit for phase B. SAG C sag C bit for phase C. F0 (fundamental of the input signal) bit.
  • Page 24: Adjusting The Kh Factor For The Demo Board

    71M6515H Demo Board User’s Manual Operating Time/RTC Area (19): This area consists of three display fields and two rectangular buttons, all located towards the lower right edge of the GUI window. GUI Element Element Function (Label) Type Operating time Display field Displays the total operating time of the 6515H chip, measured in 0.01...
  • Page 25: Adjusting The Demo Boards To Different Current Transformers And Voltage Dividers

    If, for example, IMAX = 208A are applied to a CT with a 2500:1 ratio, only 83.2mA will be generated on the secondary side, causing only 141mV The steps required to adapt a 71M6515H Demo Board to a trans- former with a winding ratio of 2500:1 are outlined below:...
  • Page 26: Calibrating The Demo Meter

    71M6515H Demo Board User’s Manual CALIBRATING THE DEMO METER The general calibration procedure is as follows: Obtain the deviation from ideal accuracy using a meter calibration system (see section 2.1). Calculate the calibration values using the error terms obtained in step 1 (see section 2.1).
  • Page 27: Application Information

    It is also very important that the calibration system, just like the hookup of a real meter, applies voltage constantly while varying the current. For the calibration of the 71M6515H it is essential that voltage is applied at least a few seconds before the measurement is started, i.e. before current is applied. This is necessary because: •...
  • Page 28: Error Sources In A Meter

    71M6515H Demo Board User’s Manual Voltage Current lags voltage (inductive Positive +60° direction Current -60° Current leads voltage (capacitive Voltage Generating Energy Using Energy Figure 2-1: Phase Angle Definitions 2.1.3 ERROR SOURCES IN A METER (CT/SHUNT RESISTOR) A typical meter has phase and gain errors as shown by φ...
  • Page 29: Calibration With Three Measurements

    71M6515H Demo Board User’s Manual 2.1.4 CALIBRATION WITH THREE MEASUREMENTS The simplest calibration method is to make three measurements. Typically, a voltage measurement and two Watt-hour (Wh) measurements are made. We assume the voltage measurement has the error E and the two Wh measurements have errors E is measured with φ...
  • Page 30: Calibration With Five Measurements

    71M6515H Demo Board User’s Manual π − − − − − PHADJ PHADJ cos( π − − − − − cos( 2.1.5 CALIBRATION WITH FIVE MEASUREMENTS The five measurement method provides more orthogonality between the gain and phase error derivations.
  • Page 31: Calibration For Meters With Rogowski Coil Sensors

    71M6515H Demo Board User’s Manual , and φ Now that we know the A errors, we calculate the new calibration voltage gain coefficient from the previous ones: We calculate PHADJ from φ , the desired phase lag:  φ −...
  • Page 32: Calibration Spreadsheets

    VFEED VFEED PREVIOUS 2.1.7 CALIBRATION SPREADSHEETS Calibration spreadsheets are available from TERIDIAN Semiconductor. Figure 2-3 shows the spreadsheet used for three measurements. Figure 2-3 shows the calibration spreadsheet used for five measurements. 71M6511/71M6513/71M6515 Calibration Worksheet Three Measurements Enter values in yellow fields Results will show in green fields…...
  • Page 33: Compensating For Non-Linearities

    71M6515H Demo Board User’s Manual 71M6511/71M6513/71M6515 Calibration Worksheet Five Measurements Results will show in green fields… Enter values in yellow fields! 0.023803667 Date: 9/28/2005 AC frequency: Author: [Hz] (click on yellow field to select from pull-down list) PHASE A: fraction Voltage Energy reading at 0°...
  • Page 34 71M6515H Demo Board User’s Manual The value to be used for QUANT can be determined by the following formula: error ⋅ − QUANT ⋅ ⋅ VMAX IMAX Where error = observed error at a given voltage (V) and current (I), VMAX = voltage scaling factor, as described in section 1.8...
  • Page 35: Schematic Information

    The oscillator of the 71M6515H drives a standard 32.768kHz watch crystal (see Figure 2-8). Crystals of this type are accurate and do not require a high current oscillator circuit. The oscillator in the 71M6515H has been designed specifically to handle watch crystals and is compatible with their high impedance and limited power handling capability.
  • Page 36: Figure 2-8: Oscillator Circuit

    71M6515H Demo Board User’s Manual 71M651X 71M6515H 10pF crystal XOUT 10pF Figure 2-8: Oscillator Circuit Note: It is not necessary to place an external resistor across the crystal, i.e. R91 on the 4-Layer Demo Board must not be populated. Note: Capacitor values for the crystal must be <15pF.
  • Page 37: Testing The Demo Board

    TESTING THE DEMO BOARD USING THE GUI It is a good idea to get familiar with the features of the 71M6515H chip and the Demo Board using the GUI program. Some features can be explored by just feeding the +5VDC to the Demo Board without any high voltage involved.
  • Page 38: Functional Meter Test

    Both numbers are given in percent. This means that for the measured Demo Board, the sum of all errors resulting from tolerances of PCB components, CTs, and 71M6515H tolerances was in the range of –0.025% to –0.459%, a range that can easily be compensated by calibration.
  • Page 39: Figure 2-11: Calibration System Screen

    71M6515H Demo Board User’s Manual Figure 2-11: Calibration System Screen Revision 2.0 39 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 40 71M6515H Demo Board User’s Manual Revision 2.0 40 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 41: Hardware Description

    1 and 2, causing VBAT to be tied to the IC supply. When using an external battery, the battery is connected between pins 2 (+) and 3 (GND). Table 3-1: 71M6515H Demo Board Description: 1/3 Revision 2.0 41 of 66...
  • Page 42: Table 3-2: 71M6515H Demo Board Description: 2/3

    PULSE_INT plugged between pins 2 and 3 causing the pulse outputs to be at the low (0V) state. Three-pin header for enabling the UART of the 71M6515H. In the default setting, a jumper is plugged between UARTCSZ pins 2 and 3, causing the UART to be enabled.
  • Page 43: Figure 3-1: 71M6515H Demo Board: Connectors, Headers, Leds, Switches

    71M6515H Demo Board User’s Manual This 3-pin header allows selection of the baud rate for the UART of the 71M6515H. In the default position (pin 1 to 2), the chip operates at 19.2kbps. When the jumper is JP32 BAUDRATE plugged between pins 2 and 3, the chip operates at 38.4kbps.
  • Page 44: Connector Descriptions

    Table 3-4: JP6 Pin Description 3.2.2 JP18 – EXTERNAL INTERFACE JP18 provides access to the digital I/O pins and to other signals of the 71M6515H chip. The pin layout for JP18 is shown in Table 3-5. JP18 Pin Signal...
  • Page 45: Jp21 - Debug Interface

    71M6515H Demo Board User’s Manual 3.2.3 JP21 – DEBUG INTERFACE JP21 provides the connection to the Debug Board. It carries the UART TX and RX signals needed for the communication with the host. A few other signals are useful for diagnosis and test are provided also. The pin layout for JP21 is shown in Table 3-6.
  • Page 46: Board Hardware Specifications

    71M6515H Demo Board User’s Manual BOARD HARDWARE SPECIFICATIONS PCB Dimensions • Width 5.125” (130.2mm) • Length 4.7” (119.4mm) • Thickness 0.062” (1.6mm) • Height w/ components and 3/8” spacers 1.5” (38.1mm) Environmental • Operating Temperature -40°…+85°C (function of crystal oscillator affected outside –10°C to +60°C) •...
  • Page 47: Appendix

    71M6515H Demo Board PCB Silk screen layer – Bottom side 71M6515H Demo Board PCB Metal Layer – Top side 71M6515H Demo Board PCB Metal Layer – Middle 1, ground plane 71M6515H Demo Board PCB Metal Layer – Middle 2, supply plane 71M6515H Demo Board PCB Metal Layer –...
  • Page 48: Figure 4-1: Teridian 71M6515H Demo Board: Electrical Schematic 1/3

    * = 1206 PACKAGE JP21 V3P3 CKTEST_T CKTEST TMUXOUT_T UART_TX_T UART_RX Top Mount Holes DEBUG MOUNT TMUXOUT HEADER 8X2 DEBUG CONNECTOR UART_TX Figure 4-1: TERIDIAN 71M6515H Demo Board: Electrical Schematic 1/3 Revision 2.0 48 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 49: Figure 4-2: Teridian 71M6515H Demo Board: Electrical Schematic 2/3

    CONNECTIONS = 1206 PACKAGE 220K 220K 220K 220K 120K 4.7K 0.001uF V3P3 0.001uF JP25 NEUTRAL NEUTRAL NEUTRAL 0.001uF VOLTAGE CONNECTIONS Figure 4-2: TERIDIAN 71M6515H Demo Board: Electrical Schematic 2/3 Revision 2.0 49 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 50: Figure 4-3: Teridian 71M6515H Demo Board: Electrical Schematic 3/3

    TP16 3 WAY RESISTOR PAD R111 R112 POPULATE 10K BETWEEN 1&2 V3P3 0.1uF TMUXOUT CKTEST TMUXOUT CKTEST JP32 TP17 TP18 Figure 4-3: TERIDIAN 71M6515H Demo Board: Electrical Schematic 3/3 Revision 2.0 50 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 51: Table 4-1: 71M6515H Demo Board: Bill Of Material

    71M6515H 64TQFP 71M6515H-IGT TERIDIAN at U5 64TQFP SOCKET 64TQFP IC149-064-169-S5 YAMAICHI TL431AIDR 296-1288-1-ND TL431AIDR Texas Instruments 32.768KHz SMT quartz XC488CT-ND ECS-.327-12.5-17-TR Table 4-1: 71M6515H Demo Board: Bill of Material Revision 2.0 51 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 52: Figure 4-4: Teridian 71M6515H Demo Board: Top View

    71M6515H Demo Board User’s Manual Figure 4-4: TERIDIAN 71M6515H Demo Board: Top View Revision 2.0 52 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 53: Figure 4-5: Teridian 71M6515H Demo Board: Bottom View

    71M6515H Demo Board User’s Manual Figure 4-5: TERIDIAN 71M6515H Demo Board: Bottom View Revision 2.0 53 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 54: Figure 4-6: Teridian 71M6515H Demo Board: Top Signal Layer

    71M6515H Demo Board User’s Manual Figure 4-6: TERIDIAN 71M6515H Demo Board: Top Signal Layer Revision 2.0 54 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 55: Figure 4-7: Teridian 71M6515H Demo Board: Middle Layer 1, Ground Plane

    71M6515H Demo Board User’s Manual Figure 4-7: TERIDIAN 71M6515H Demo Board: Middle Layer 1, Ground Plane. Revision 2.0 55 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 56: Figure 4-8: Teridian 71M6515H Demo Board: Middle Layer 2, Supply Plane

    71M6515H Demo Board User’s Manual Figure 4-8: TERIDIAN 71M6515H Demo Board: Middle Layer 2, Supply Plane. Revision 2.0 56 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 57: Figure 4-9: Teridian 71M6515H Demo Board: Bottom Signal Layer

    71M6515H Demo Board User’s Manual Figure 4-9: TERIDIAN 71M6515H Demo Board: Bottom Signal Layer Revision 2.0 57 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 58: Table 4-2: Debug Board: Bill Of Material

    71M6515H Demo Board User’s Manual Item Quantity Reference Part PCB Footprint Digi-Key Part Number Part Number Manufacturer 445-1349-1-ND C1-C3,C5-C10,C12-C23 0.1uF RC0805 C2012X7R1H104K 33uF, 10V RC1812 478-1687-1-ND TAJB336K010R 10uF, 16V RC1812 478-1673-1-ND TAJB106K016R D2,D3 RC0805 160-1414-1-ND LTST-C170KGKT LITEON G1,G2,G3,G4 Spacer MTHOLE...
  • Page 59: Figure 4-10: Debug Board Schematics

    71M6515H Demo Board User’s Manual V5_DBG 0.1uF 0.1uF GND_DBG V3P3 VDD1 VDD2 V5_DBG GND2 DIO02 VDD1 DOUT GND_DBG GND1 GND2 V5_DBG V5_DBG 5Vdc EXT SUPPLY DISPLAY SEL ADUM1100 GND_DBG 0.1uF GND_DBG V5_DBG 33uF, 10V 0.1uF RAPC712 GND_DBG 0.1uF GND_DBG 0.1uF...
  • Page 60: Figure 4-11: Debug Board: Top View

    71M6515H Demo Board User’s Manual Figure 4-11: Debug Board: Top View Figure 4-12: Debug Board: Bottom View Revision 2.0 60 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 61: Figure 4-13: Debug Board: Top Signal Layer

    71M6515H Demo Board User’s Manual Figure 4-13: Debug Board: Top Signal Layer Figure 4-14: Debug Board: Middle Layer 1, Ground Plane Revision 2.0 61 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 62: Figure 4-15: Debug Board: Middle Layer 2, Supply Plane

    71M6515H Demo Board User’s Manual Figure 4-15: Debug Board: Middle Layer 2, Supply Plane Figure 4-16: Debug Board: Bottom Trace Layer Revision 2.0 62 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 63: Table 4-3: 71M6515H Pin Description Table 1/2

    61,63 Typically, a 10pF capacitor is also connected from each pin to GNDA. See the datasheet of the crystal manufacturer for details. Table 4-3: 71M6515H Pin Description Table 1/2 Revision 2.0 63 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 64: Table 4-4: 71M6515H Pin Description Table 2/2

    TMUXOUT Digital output test multiplexer. Controlled by TMUX[2:0]. RPULSE Selectable pulse output (default: VARh pulse). WPULSE Selectable pulse output (default: Wh pulse). Table 4-4: 71M6515H Pin Description Table 2/2 Revision 2.0 64 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 65: Figure 4-17: Teridian 71M6515H Lqfp64: Pinout (Top View)

    71M6515H-IGT PULSE_INIT RESERVED RESERVED RESERVED RESERVED RPULSE PULSE3 WPULSE PULSE4 UARTCSZ BAUD_RATE Figure 4-17: TERIDIAN 71M6515H LQFP64: Pinout (top view) Note: Pins labeled as RESERVED must not be connected. Revision 2.0 65 of 66 © Copyright 2005 TERIDIAN Semiconductor Corporation...
  • Page 66 71M6515H Demo Board User’s Manual User’s Manual: This User’s Manual contains proprietary product definition information of TERIDIAN Semiconductor Corporation (TSC) and is made available for informational purposes only. TERIDIAN assumes no obligation regarding future manufacture, unless agreed to in writing.

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