Circuit Description - Sony HDC-P1 Maintenance Manual

1-4. Circuit Description

PA-353P Board
The PA-353P board, consisting of an H driver (IC1) for CCD drive and a sample hold IC (IC5), performs
correlative double-sampling for the signal from the CCD and differential output. This board also adjusts
sensitivity by the sample hold IC.
DR-632P Board
The DR-632P board consists of a buffer for the CCD and sample hold IC drive pulse and a V driver circuit
of the CCD.
TG-265PT Board
The TG-265PT board consists of the following circuits.
. A PLD (IC218) that generates CCD/sample hold IC drive pulse and a video amplifi er (IC1, IC8, IC18)
. A circuit to synchronize (PLL lock) the INT PLL H signal generated by the PLD with the PLL H X and
PLL H Y signals sent from the DPR-315 board
The master gain is switched by the step gain in the video amplifi er.
NR-80P Board
The NR-80P board corrects CCD defects and performs black shading.
DPR-315 Board
The DPR-315 board converts the analog RGB signals from the CCD block to digital data and processes
camera signals.
The analog RGB signals from the TG-265PT board in the CCD block are A/D-converted by the 14-bit
A/D converter (IC207 to IC209), and the converted digital data is input to the preprocess PLD (IC301).
The digital data is processed by the IC301 for the 720p format, is input to the camera signal processor
(IC401) for camera signal processing, and is then returned to the IC301.
Two SDRAM chips (IC501, IC502) are mounted as frame memory near the IC301. The IC301 performs
image inversion (H/V mirror processing) and P-PsF conversion processing in the PsF format, and then
transfers the digital data to the baseband signal processing block (DPR-316 board).
Furthermore, the IC301 generates and transfers the reference timing signal to the CCD block.
DPR-316 Board
The DPR-316 board processes various baseband signals.
This board is provided with the following four video input/output BNC connectors.
. REF IN connector CN301 (input)
. SDI 1 connector CN801 (output)
. SDI 2 connector CN802 (output)
. VBS connector CN901 (output)
The HD digital video signal to which camera signal processing was applied on the DPR-315 board is
transferred to the baseband processing IC (IC107) where baseband signal processing is performed, and is
then converted to a serial signal by the SDI P/S converter (IC801, IC802). The serial signal is output as
SDI signal from CN801 and CN802.
IC107 is provided with a down-converter function and IC801 and IC802 can select and output HD SDI or
SD SDI signal. The down-converted SD signal is VBS-encoded and D/A-converted by the encoder
(IC901), and the converted VBS signal is output from CN901.
The DPR-316 board mounts SDRAM (IC501, IC502) and OSD IC (IC622, IC623) around IC107 as frame
memory. IC107 also performs 2-3 pull-down processing and character signal mixing processing for 24PsF.
Furthermore, this board is provided with a GEN LOCK function that extracts sync signal from the refer-
ence input signal in CN301, generates a reference clock by the 74 MHz/27 MHz PLL circuit, and distrib-
utes the clock and the reference timing signal to each video signal processing block.
1-8 (E)
HDC-P1