Mask Option; Control Of A/D Converter - Epson S1C63358 Technical Manual

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)

4.10.3 Mask option

I/O port pull-up resistor
P40 (AD0) With pull-up
P41 (AD1) With pull-up
P42 (AD2) With pull-up
P43 (AD3) With pull-up
The input terminals of the A/D converter are shared with the I/O port terminals P40–P43. Therefore, the
terminal specification of the A/D converter is decided by setting the I/O port mask option. Select "Gate
direct" for the port corresponding to the channel to be used to obtain the conversion precision.

4.10.4 Control of A/D converter

(1) Setting of A/D input terminal
When using the A/D converter, it is necessary to set up the terminals used for analog input from the
P40–P43 initialized as the I/O port terminals. Four terminals can all be used as analog input termi-
nals.
The PAD (PAD0–PAD3) register is used to set analog input terminals. When the PAD register bits are
set to "1", the corresponding terminals function as the analog input terminals.
At initial reset, these terminals are all set in the I/O port terminals, and each terminal goes to a high
impedance.
Table 4.10.4.1 Correspondence between A/D input terminal and PAD register
(2) Setting of input clock
The clock selector selects the A/D conversion clock from OSC1 or OSC3 according to the value
written in the ADCLK register. Table 4.10.4.2 shows the input clock selection with the ADCLK register.
The clock selector outputs the selected clock to the A/D converter by writing "1" to the ADRUN
register.
Note: • When the supply voltage is in the range of 2.7 to 3.6 V, the input clock can be selected from
OSC1 or OSC3. When the supply voltage is in the range of 2.3 to 2.7 V, the input clock can be
selected from OSC1 or OSC3, but OSC3 clock freguency should less than 2.5 MHz. When the
supply voltage is in the range of 0.9 to 2.3 V, OSC1 can only be selected.
• Be sure to select (change) the input clock while the A/D converter is stopped. Changing the
clock during A/D operation may cause problems.
• To prevent malfunction, do not start A/D conversion (writing "1" to the ADRUN register) when the
A/D conversion clock is not being output from the clock selector, and do not turn the clock off
during A/D conversion.
70
Gate direct
Gate direct
Gate direct
Gate direct
Terminal A/D input enable /disable
P40 (AD0) PAD0
P41 (AD1) PAD1
P42 (AD2) PAD2
P43 (AD3) PAD3
Table 4.10.4.2 Input clock selection
ADCLK
0
1
EPSON
Comment
Clock source
OSC1
OSC3/2
S1C63358 TECHNICAL MANUAL