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K00–K03: K0 port input port data (FF21H)
K10–K13: K1 port input port data (FF25H)
K20:
K20 port input port data (FF29H•D0)
Input data of the input port terminals can be read with these registers.
When "1" is read: High level
When "0" is read: Low level
Writing: Invalid
The reading is "1" when the terminal voltage of the nine bits of the input ports (K00–K03, K10–K13, K20)
goes high (V
), and "0" when the voltage goes low (V
DD
These bits are dedicated for reading, so writing cannot be done.
SIK00–SIK03: K0 port interrupt selection register (FF20H)
SIK10–SIK13: K1 port interrupt selection register (FF24H)
SIK20:
K20 port interrupt selection register (FF28H•D0)
Selects the ports to be used for the K00–K03, K10–K13 and K20 input interrupts.
When "1" is written: Enable
When "0" is written: Disable
Reading: Valid
Enables the interrupt for the input ports (K00–K03, K10–K13, K20) for which "1" has been written into the
interrupt selection registers (SIK00–SIK03, SIK10–SIK13, SIK20). The input port set for "0" does not affect
the interrupt generation condition.
At initial reset, these registers are set to "0".
KCP00–KCP03: K0 port input comparison register (FF22H)
KCP10–KCP13: K1 port input comparison register (FF26H)
KCP20:
K20 port input comparison register (FF2AH•D0)
Interrupt conditions for terminals K00–K03, K10–K13 and K20 can be set with these registers.
When "1" is written: Falling edge
When "0" is written: Rising edge
Reading: Valid
The interrupt conditions can be set for the rising or falling edge of input for each of the nine bits (K00–
K03, K10–K13, K20), through the input comparison registers (KCP00–KCP03, KCP10–KCP13, KCP20).
For KCP00–KCP03, a comparison is done only with the ports that are enabled by the interrupt among
K00–K03 by means of the SIK00–SIK03 registers. For KCP10–KCP13, a comparison is done only with the
ports that are enabled by the interrupt among K10–K13 by means of the SIK10–SIK13 registers. For
KCP20, a comparison is done only when the K20 port has been enabled by means of the SIK20 register.
At initial reset, these registers are set to "1".
EIK0: K0 input interrupt mask register (FFE4H•D0)
EIK1: K1 input interrupt mask register (FFE5H•D0)
EIK2: K20 input interrupt mask register (FFE5H•D1)
Masking the interrupt of the input port can be selected with these registers.
When "1" is written: Enable
When "0" is written: Mask
Reading: Valid
With these registers, masking of the input port interrupt can be selected for each of the three systems
(K00–K03, K10–K13, K20).
At initial reset, these registers are set to "0".
S1C63358 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
).
SS
EPSON
39
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