Use Of 68En360 Dma Channels; Vmebus Interface - PEP VM162 User Manual

VM162/VM172
Note: In order to be compatible with the above configuration, the board initialization described in the
Programming Chapter must be closely adhered to.
VME ACFAIL* generates a non-maskable autovector level 7 interrupt (NMI) in the same way as the AB-
ORT button. When an ACFAIL* NMI is detected, it can be differentiated from an ABORT by reading bit
1 of the Board Configuration Register.

2.4.4 Use of 68EN360 DMA Channels

The 68EN360 includes altogether 14 DMA channels which are dedicated to the communication ports
(SDMA) and 2 independant DMA channels (IDMA). With the IDMAs memory to memory transfers
are possible with any combination of onboard and A24/D16 VME addresses.
Note: In order to be compatible with CPU VME and DMA VME transfers, the board initialization des-
cribed in the Programming Chapter must be closely adhered to.

2.5 VMEbus Interface

The VM162/VM172 has a complete VMEbus Master interface with arbiter, system clock driver, power
monitor with system reset driver, IACK daisy chain driver and a 7-level VMEbus interrupt handler.
The VM162/VM172 VMEbus Master interface supports A32, A24 and A16 addressing modes in any
combination with D32, D16 and D8 data bus width.
Arbitration is single level FAIR on BR3. Used as system controller the board has to be placed in slot 1
of the VMEbus backplane (furthermost left slot).
VMEbus system signals ACFAIL* and SYSFAIL* are processed by the VM162/VM172 to autovecto-
red interrupt requests (see also the Use of 68EN360 Interrupt Controller Section).
In addition, the board provides also a VMEbus Slave interface which consists of a dual-ported RAM
with programmable board address and a mailbox interrupt facility.
Page 2- 8
Chapter 2 Functional Description
© PEP Modular Computers
Juli 23, 1997