Functional Description - PEP VM162 User Manual

Functional Description

2.1 VM162/VM172 Block Diagram..................................................... 2-3
2.2 CPU Options ................................................................................. 2-4
2.3 Memory..........................................................................................2-4
2.4 Communication Controller 68EN360 (QUICC) ...........................2-6
2.5 VMEbus Interface..........................................................................2-8
2.6 Board Control Logic ................................................................... 2-14
2.7 Special Functions ........................................................................ 2-18
2.8 Serial Communication Ports ....................................................... 2-20
Juli 23, 1997
2.3.1 DRAM/FLASH...............................................................................................2-4
2.3.2 SRAM.............................................................................................................2-5
2.3.3 Boot ROM (optional).....................................................................................2-5
2.3.4 EEPROM.......................................................................................................2-6
2.4.1 Use of 68EN360 Communication Ports ........................................................2-6
2.4.2 Use of 68EN360 Memory Controller ............................................................2-7
2.4.3 Use of 68EN360 Interrupt Controller ...........................................................2-7
2.4.4 Use of 68EN360 DMA Channels...................................................................2-8
2.5.1 VME Master Interface...................................................................................2-9
2.5.2 System Controller Functions.......................................................................2-10
2.5.3 VME Slave Interface ...................................................................................2-11
2.5.4 VME Address Map from the VME Side.......................................................2-12
2.5.5 VME Control/Status Register......................................................................2-13
2.6.1 Boot Decoder Logic ....................................................................................2-14
2.6.2 Interrupt Control.........................................................................................2-14
2.6.3 Bus Timer ....................................................................................................2-16
2.6.4 Watchdog Timer ..........................................................................................2-16
2.6.5 Board Control/Status Register ....................................................................2-16
2.7.1 Real Time Clock ..........................................................................................2-18
2.7.2 Serial EEPROM ..........................................................................................2-18
2.7.3 TICK Timer .................................................................................................2-18
2.7.4 General Purpose Timer...............................................................................2-18
2.7.5 DMA Transfers............................................................................................2-18
2.7.6 Data Retention for RTC and SRAM ............................................................2-19
2.7.7 Front Panel Buttons and LED Ports...........................................................2-19
2.8.1 Ethernet/SER4 Port.....................................................................................2-21
2.8.2 SER1, SER2 and SER3 Ports ......................................................................2-22
© PEP Modular Computers
VM162/VM172
Chapter
2
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