Quectel UG89 Hardware Design page 7

UMTS/HSPA+ Module Series
UG89 Hardware Design
Figure Index
Figure 1: Functional Diagram ..................................................................................................................... 13
Figure 2: Pin Assignment (Bottom View) ................................................................................................... 15
Figure 3: Voltage Drop during Burst Transmission .................................................................................... 24
Figure 4: Star Structure of the Power Supply ............................................................................................ 24
Figure 5: Reference Circuit of Power Supply ............................................................................................. 25
Figure 6: Reference Circuit of Turing on the Module Using Driving Circuit ............................................... 26
Figure 7: Reference Circuit of Turing on the Module Using Keystroke ..................................................... 26
Figure 8: Timing of Turning on the Module ................................................................................................ 27
Figure 9: Timing of Turning off the Module ................................................................................................ 28
Figure 10: Reference Circuit of Resetting the Module by Using Driving Circuit ........................................ 29
Figure 11: Reference Circuit of Resetting the Module by Using Button .................................................... 29
Figure 12: Timing of Resetting Module ...................................................................................................... 30
Figure 13: Reference Circuit with a Level Translator Chip ........................................................................ 34
Figure 14: Reference Circuit with a Transistor Circuit ............................................................................... 34
Figure 15: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector ......................... 36
Figure 16: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector ........................... 36
Figure 17: Reference Circuit of USB Application ....................................................................................... 38
Figure 18: Primary Mode Timing ................................................................................................................ 40
Figure 19: Reference Circuit of PCM Application with Audio Codec ......................................................... 41
Figure 20: Reference Circuits of STATUS ................................................................................................. 42
Figure 21: Reference Circuit of RF Antenna Interface ............................................................................... 45
Figure 22: Microstrip Design on a 2-layer PCB ......................................................................................... 46
Figure 23: Coplanar Waveguide Design on a 2-layer PCB ....................................................................... 46
Figure 24: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) .................... 46
Figure 25: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) .................... 47
Figure 26: Dimensions of the U.FL-R-SMT Connector (Unit: mm) ............................................................ 48
Figure 27: Mechanicals of U.FL-LP Connectors ........................................................................................ 49
Figure 28: Space Factor of Mated Connector (Unit: mm) .......................................................................... 49
Figure 29: Module Top and Side Dimensions ............................................................................................ 56
Figure 30: Module Bottom Dimensions (Top View) .................................................................................... 57
Figure 31: Recommended Footprint (Top View) ........................................................................................ 58
Figure 32: Top View of the Module ............................................................................................................. 59
Figure 33: Bottom View of the Module ....................................................................................................... 59
Figure 34: Reflow Soldering Thermal Profile ............................................................................................. 62
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