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QUECTEL OFFERS THIS INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION.
13. Updated I2C pins definition. 14. Updated current consumption. Modified VDD_2V85 pin definition and GNSS LNA design circuit. 2014-03-05 Mountain ZHOU Added notes about UC20 versions in Chapter 2.1. Added description about the sleep mode in UC20_Hardware_Design Confidential / Released 2 / 82 Arrow.com.
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UMTS/HSPA Module Series UC20 Hardware Design Chapter 3.16.2. Updated power circuit of Figure 6. Updated current consumption. Updated internet protocol features and USB driver. Updated VBAT input voltage range. Updated Chapter 3.6.2, and added VBAT drop figure. Updated antenna requirement in Chapter...
UMTS/HSPA Module Series UC20 Hardware Design Introduction This document defines the UC20 module and describes its hardware interface which are connected with your application and the air interface. This document can help you quickly understand module interface specifications, electrical and mechanical details.
More details about GPRS/EDGE multi-slot configuration and coding schemes, please refer to Appendix B, C and D. With a tiny profile of 32.0mm × 29.0mm × 2.5mm, UC20 can meet almost all requirements for M2M application such as automotive, metering, tracking system, security solutions, routers, wireless POS, mobile computing devices, PDA phone and tablet PC, etc..
UMTS/HSPA Module Series UC20 Hardware Design UC20 is an SMD type module, which can be embedded in application through its 112-pin pads including 72 LCC signal pads and 40 other pads. UC20 is integrated with internet service protocols like TCP/UDP and PPP. Extended AT commands have been developed for customer to use these internet service protocols easily.
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UMTS/HSPA Module Series UC20 Hardware Design scheme). Downlink coding schemes: CS 1-4 and MCS 1-9 Uplink coding schemes: CS 1-4 and MCS 1-9 CSD: CSD transmission rates: 14.4kbps non-transparent Support Unstructured Supplementary Services Data (USSD). Support TCP/UDP/PPP/FTP/SMTP/HTTP/FILE/MMS/SSL protocols Support the protocols PAP (Password Authentication Protocol) and...
. When the module works within this restricted temperature range, RF performance might degrade. For example, the frequency error or the phase error would increase. 2.3. Functional Diagram The following figure shows a block diagram of UC20 and illustrates the major functional parts. Power management ...
Figure 1: Functional Diagram 2.4. Evaluation Board In order to help you to develop applications with UC20, Quectel supplies an evaluation board (EVB), RS-232 to USB cable, USB data cable, power adapter, earphone, antenna and other peripherals to control or test the module. For details, please refer to document [2].
UC20 Hardware Design Application Interface 3.1. General Description UC20 is equipped with a 72-pin 1.3mm pitch SMT pads plus 40-pin other pads that connect to cellular application platform. Sub-interfaces included in these pads are described in detail in the following chapters: ...
UMTS/HSPA Module Series UC20 Hardware Design 3.3. Pin Description The following tables show the UC20’s pin definition. Table 3: IO Parameters Definition Type Description Bidirectional input/output Digital input Digital output Power input Power output Analog input Analog output Open drain...
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UMTS/HSPA Module Series UC20 Hardware Design external GPIO’s pull up external circuit. max = 20mA circuits. Reserved for future Provide 2.85V for Vnorm = 2.85V VDD_2V85 application. If unused, external circuit. max = 100mA keep it open. 8,9,19,36, 46,48,50~ Ground.
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UMTS/HSPA Module Series UC20 Hardware Design Compliant with USB USB differential data Require differential USB_DP 2.0 standard bus. impedance of 90Ω. specification. Compliant with USB USB differential data Require differential USB_DM 2.0 standard bus. impedance of 90Ω. specification. USIM Interface Pin Name Pin No.
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UMTS/HSPA Module Series UC20 Hardware Design min = 2.55V min = -0.3V 1.8V power domain. USIM_PRE USIM card insertion max = 0.6V If unused, keep it SENCE detection. min = 1.2V open. max = 2.0V ADC Interface Pin Name Pin No.
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UMTS/HSPA Module Series UC20 Hardware Design max = 2.0V Debug UART Interface Pin Name Pin No. Description DC Characteristics Comment 1.8V power domain. max = 0.45V DBG_TXD Transmit data. If unused, keep it min = 1.35V open. min = -0.3V 1.8V power domain.
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UMTS/HSPA Module Series UC20 Hardware Design Reserved for analog If unused, connect AGND Ground. ground. this pin to ground. I2C Interface Pin Name Pin No. Description DC Characteristics Comment External pull-up resistor is required. I2C_SCL I2C serial clock. 1.8V only. If unused, keep it open.
UMTS/HSPA Module Series UC20 Hardware Design 3.4. Operating Modes The table below briefly summarizes the various operating modes referred to in the following chapters. Table 5: Overview of Operating Modes Mode Details Software is active. The module has registered to the GSM network GSM Idle and is ready to send and receive data.
3.5. Power Saving 3.5.1. Sleep Mode UC20 is able to reduce its current consumption to a minimum value during the sleep mode. The following section describes UC20’s power saving procedure. 3.5.1.1. UART Application If application processor communicates with module via UART interface, the following preconditions can let the module enter into the sleep mode.
UMTS/HSPA Module Series UC20 Hardware Design match shown in dotted line between module and processor. Driving DTR to low level will wake up the module. 3.5.1.2. USB Application with Suspend Function If application processor communicates with module via USB interface, and processor supports USB suspend function, the following preconditions can let the module enter into the sleep mode.
UMTS/HSPA Module Series UC20 Hardware Design The following figure shows the connection between the module and application processor. Module Processor GPIO Power USB_VBUS Switch USB_DP USB_DP USB_DM USB_DM EINT GPIO AP_READY Figure 5: USB Sleep Application without Suspend Function Supply power to USB_VBUS will wake up the module.
3. GNSS function is still available when RF function is disabled. 3.6. Power Supply 3.6.1. Power Supply Pins UC20 provides four VBAT pins dedicated to connect with the external power supply. There are two separate voltage domains for VBAT. ...
Three ceramic capacitors (100nF, 33pF, 10pF) are recommended to be applied to the VBAT pins. The capacitors should be placed close to the UC20’s VBAT pins. In addition, in order to get a stable power source, it is suggested to use a zener diode of which reverse zener voltage is 5.1V and dissipation power is more than 0.5W.
= 500mV When UC20 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level at least 100ms. It is recommended to use an open drain/collector driver to control the PWRKEY.
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UMTS/HSPA Module Series UC20 Hardware Design reference circuit is illustrated in the following figure. PWRKEY ≥ 100ms 4.7K Turn on pulse Figure 9: Turn on the Module Using Driving Circuit The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection.
UMTS/HSPA Module Series UC20 Hardware Design VBAT ≥ 100ms ≥ 1.3V ≤ 0.5V PWRKEY RESET_N 1.3 ~ 1.9s STATUS (OD) ≥ 5s Inactive UART Active ≥ 5s Inactive Active Figure 11: Timing of Turning on Module NOTE Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is recommended to be 30ms.
UMTS/HSPA Module Series UC20 Hardware Design VBAT ≥ 0.6s Log off network about 1s to 60s PWRKEY STATUS (OD) Module Power-down procedure RUNNING Status Figure 12: Timing of Turning off Module During power-down procedure, module will send out URC “NORMAL POWER DOWN” via URC port first, then log off network and save important data.
UMTS/HSPA Module Series UC20 Hardware Design The uncritical voltage is 3.3V to 4.35V, If the voltage > 4.35V or < 3.3V the module would automatically shut down itself. If the voltage < 3.3V, the following URC will be presented: +QIND: “vbatt”,-2 If the voltage >...
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UMTS/HSPA Module Series UC20 Hardware Design RESET_N ≥ 150ms 4.7K Reset pulse Figure 13: Reference Circuit of RESET_N by Using Driving Circuit RESET_N Close to S2 Figure 14: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated as the following figure.
UMTS/HSPA Module Series UC20 Hardware Design 3.9. RTC Backup The RTC (Real Time Clock) can be powered by an external power source through the pin VRTC when the module is powered down and there is no power supply for the VBAT. It is also available to charge the battery on the VRTC when module is turned on.
UMTS/HSPA Module Series UC20 Hardware Design VRTC Core Large Capacitance Capacitor Module Figure 18: RTC Supply from Capacitor 3.10. UART Interface The module provides two UART interfaces: main UART interface and debug UART interface. The following shows the different features.
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0.45 1.35 UC20 provides 1.8V UART interface. A level translator should be used if your application is equipped with a 3.3V UART interface. A level translator TXS0108PWR provided by Texas Instrument is recommended. The following figure shows the reference design.
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Figure 20: Reference Circuit with Transistor Circuit The following figure is an example of connection between UC20 and PC. A voltage level translator and a RS-232 level translator chip must be inserted between module and PC, since these two UART interfaces do not support the RS-232 level, while support the 1.8V CMOS level only.
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Some AT commands are invalid when USIM card is not applied. UC20 supports USIM card hot-plugging via the USIM_PRESENCE pin. For details, refer to document [1] about the command AT+QSIMDET. If you do not need the USIM card detection function, keep USIM_PRESENCE unconnected.
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UMTS/HSPA Module Series UC20 Hardware Design USIM_VDD 100nF USIM_GND USIM Connector USIM_VDD USIM_RST Module USIM_CLK USIM_DATA 33pF 33pF 33pF Figure 23: Reference Circuit of the 6 Pin USIM Card In order to enhance the reliability and availability of the USIM card in your application, please follow the following criterion in the USIM circuit design: ...
UC20 Hardware Design 3.12. USB Interface UC20 contains one integrated Universal Serial Bus (USB) transceiver which complies with the USB 2.0 specification and supports high speed (480 Mbps), full speed (12 Mbps) and low speed (1.5 Mbps) mode. The USB interface is primarily used for AT command, data transmission, GNSS NMEA sentences output, software debug and firmware upgrade.
PWRKEY Figure 25: Test Points of Firmware Upgrade 3.13. PCM and I2C Interface UC20 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following modes: Primary mode (short sync, works as both master and slave) ...
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128kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC only. UC20 supports 8-bit A-law and μ-law, and also 16-bit linear data formats. The following figures show the primary mode’s timing relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK and auxiliary mode’s timing relationship with 8kHz PCM_SYNC and 128kHz PCM_CLK.
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Clock and mode can be configured by AT command, and the default configuration is master mode using short sync data format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. In addition, UC20’s firmware has integrated the configuration on NAU8814 application with I2C interface. Refer to document [1] about the command AT+QDAI for details.
It is recommended to reserved RC (R=22Ω, C=22pF) circuit on the PCM lines, especially for PCM_CLK. UC20 works as a master device pertaining to I2C interface. 3.14. ADC Function The module provides two analog-to-digital converters (ADC) to digitize the analog signal to 15-bit digital data such as battery voltage, temperature and so on.
UMTS/HSPA Module Series UC20 Hardware Design 3.15. Network Status Indication The network indication pins can be used to drive a network status indicator LED. The module provides two pins which are NET_MODE and NET_STATUS. The following tables describe pin definition and logic level changes in different network status.
UMTS/HSPA Module Series UC20 Hardware Design 3.16. Operating Status Indication 3.16.1. STATUS The STATUS pin is an open drain output for indicating the module operation status. You can connect it to a GPIO of DTE with pulled up, or as LED indication circuit as below. When the module is turned on normally, the STATUS will present the low state.
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UMTS/HSPA Module Series UC20 Hardware Design Table 20: Pin Definition of SLEEP_IND Pin Name Pin No. Description Comment 1.8V power domain. SLEEP_IND Indicate the sleep status. Outputs high level when the module is in sleep mode. A reference circuit is shown in the following figure.
UMTS/HSPA Module Series UC20 Hardware Design As to GSM network, the paging period time can be calculated with the following formula. T= 4.615ms × 51 × DRX As to WCDMA network, the paging period time can be calculated with the following formula.
UC20 supports standard NMEA-0183 protocol, and outputs NMEA sentences with 1Hz via USB interface by default. By default, UC20 GNSS engine is switched off, it has to be switched on with AT command. For more details about GNSS engine technology and configurations, refer to document [7].
UMTS/HSPA Module Series UC20 Hardware Design 4.3. Layout Guideline The following layout guideline should be taken into account in your design. Maximize the distance between the GNSS antenna and the main GSM/UMTS antenna. Noisy digital circuits such as the USIM card, USB interface, Camera module, Display connector and SD card should be away from the antenna.
UMTS/HSPA Module Series UC20 Hardware Design Antenna Interface UC20 antenna interface includes a main GSM/UMTS antenna, an optional UMTS Rx-diversity antenna, which is used to improve UMTS’s receiving performance, and a GNSS antenna. The antenna interface has an impedance of 50Ω.
UMTS/HSPA Module Series UC20 Hardware Design 5.2. GNSS Antenna Interface The following tables show the GNSS antenna pin definition and frequency specification. Table 25: Pin Definition of GNSS Antenna Pin Name Pin No. Description Comment ANT_GNSS GNSS antenna 50Ω impedance...
UMTS/HSPA Module Series UC20 Hardware Design 5.2.2. Reference Design for Active Antenna Active 0.1uF antenna 47nH 100pF ANT_GNSS Module Figure 35: Reference Circuit of GNSS Active Antenna NOTES You can choose the corresponding reference circuit above according to your demands on antenna circuit design.
UMTS/HSPA Module Series UC20 Hardware Design Table 27: Antenna Requirements Type Requirements Frequency range: 1565~1607 MHz Polarization: RHCP or linear VSWR: < 2 (Typ.) Passive antenna gain: > 0dBi GNSS Active antenna noise figure: < 1.5dB Active antenna gain: > -2dBi Active antenna embedded LNA gain: 20dB (Typ.)
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UMTS/HSPA Module Series UC20 Hardware Design You can use U.FL-LP serial connector listed in the following figure to match the UF.L-R-SMT. Figure 37: Mechanicals of UF.L-LP Connectors The following figure describes the space factor of mated connector. Figure 38: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
UMTS/HSPA Module Series UC20 Hardware Design Electrical, Reliability Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table: Table 28: Absolute Maximum Ratings Parameter Min.
UMTS/HSPA Module Series UC20 Hardware Design Parameter Description Conditions Min. Typ. Max. Unit drop, ripple and spikes. Voltage drop during Maximum power control level on transmitting GSM850 and EGSM900. burst Peak supply current (during Maximum power control level on VBAT transmission GSM850 and EGSM900.
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UMTS/HSPA Module Series UC20 Hardware Design Table 31: The Module Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down supply current 3.6 @DRX=2 Sleep (USB disconnected) 1.5 @DRX=9 3.7 @DRX=2 GSM/GPRS Sleep (USB suspended) supply current 1.6 @DRX=9 Idle (USB disconnected) 15.0 @DRX=2...
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UMTS/HSPA Module Series UC20 Hardware Design PCS1900 3DL/2UL PCL=2 PCS1900 2DL/3UL PCL=2 PCS1900 1DL/4UL PCL=2 UMTS Band I HSDPA @max power UMTS Band I HSUPA @max power UMTS Band II HSDPA @max power UMTS Band II HSUPA @max power WCDMA data...
For Cold Start, 10 minutes after First Fix. For Hot Start, 15 seconds after First Fix. 6.5. RF Output Power The following table shows the RF output power of UC20 module. Table 32: Conducted RF Output Power Frequency Max.
UC20 Hardware Design Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 7.1. Mechanical Dimensions of the Module (32+/-0.15) Figure 39: UC20 Top and Side Dimensions UC20_Hardware_Design Confidential / Released 68 / 82 Arrow.com.
UMTS/HSPA Module Series UC20 Hardware Design 7.2. Footprint of Recommendation 22.1 3.45 6.45 Keepout area Figure 42: Recommended Footprint (Top View) NOTES Pads 73~84 at the bottom center of module cannot be designed. And keep out the areas shown in pink on the above figure in the host PCB.
UMTS/HSPA Module Series UC20 Hardware Design 7.3. Top View of the Module Figure 43: Top View of the Module 7.4. Bottom View of the Module Figure 44: Bottom View of the Module UC20_Hardware_Design Confidential / Released 72 / 82 Arrow.com.
Storage and Manufacturing 8.1. Storage UC20 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag is 12 months at < 40º C/90%RH. After this bag is opened, devices that will be subjected to reflow solder or other high temperature process must be: Mounted within 72 hours at factory conditions of ≤...
º C Time Figure 45: Liquids Temperature 8.3. Packaging UC20 is packaged in the tap and reel carriers. One reel is 11.53m length and contains 250pcs modules. The figure below shows the package details, measured in mm. UC20_Hardware_Design Confidential / Released 74 / 82 Arrow.com.
Document Name Remark Quectel_UC20_AT_Commands_Manual UC20 AT Commands Manual Quectel_UC20_EVB_User_Guide UC20 EVB User Guide Quectel_UC20_Reference_Design UC20 Reference Design UC20 and M10 Compatible Reference Quectel_UC20&M10_Reference_Design Design Quectel_UC20&M10_Compatible_Design UC20 and M10 Compatible Design Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Quectel_UC20_GNSS_AT_Commands_Manual UC20 GNSS AT Commands Manual...
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UMTS/HSPA Module Series UC20 Hardware Design Clear To Send Data Communications Equipment (typically module) Discontinuous Reception Data Terminal Equipment (typically computer, external controller) Data Terminal Ready Discontinuous Transmission Enhanced Full Rate EGSM Extended GSM900 band (includes standard GSM900 band) Electrostatic Discharge...
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UMTS/HSPA Module Series UC20 Hardware Design Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol PBCCH Packet Switched Broadcast Control Channel Printed Circuit Board Protocol Data Unit Point-to-Point Protocol Phase Shift Keying Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying...
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UMTS/HSPA Module Series UC20 Hardware Design Vmin Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value Absolute Minimum Input Voltage Value...
UMTS/HSPA Module Series UC20 Hardware Design Appendix C GPRS Multi-slot Class Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions.
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