Quectel UG89 Hardware Design page 35

VDD_EXT
0.1uF
UART1_RI
UART1_DCD
UART1_CTS
UART1_RTS
UART1_DTR
UART1_TXD
UART1_RXD
UART1_DSR
Figure 13: Reference Circuit with a Level Translator Chip
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown below. For the design of circuits in dotted lines,
please refer to that of the circuits in solid lines, but please pay attention to the direction of connection.
MCU/ARM
UG89_Hardware_Design
VCCA
120K
OE
A1
A2
A3
A4
A5
A6
A7
A8
VDD_EXT
TXD
RXD
10K
VCC_MCU
RTS
CTS
GPIO
EINT
GPIO
GPIO
GND
Figure 14: Reference Circuit with a Transistor Circuit
VCCB
GND
B1
B2
Translator
B3
B4
B5
B6
B7
B8
4.7K
VDD_EXT
1nF
10K
1nF
VDD_EXT
4.7K
UMTS/HSPA+ Module Series
UG89 Hardware Design
VDD_MCU
0.1uF
RI_MCU
DCD_MCU
CTS_MCU
RTS_MCU
DTR_MCU
TXD_MCU
RXD_MCU
DSR_MCU
Module
UART1_RXD
UART1_TXD
UART1_RTS
UART1_CTS
UART1_DTR
UART1_RI
UART1_DCD
UART1_DSR
GND
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