Quectel UG89 Hardware Design page 41

Umts/hspa+ module series
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The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec design.
Table 18: Pin Definition of PCM and I2C Interfaces
Pin Name
Pin No.
PCM_DIN
26
PCM_DOUT
24
PCM_SYNC
25
PCM_CLK
27
I2C_SCL
29
UG89_Hardware_Design
P CM _CLK
1
P CM _S YNC
MS B
P CM _DOUT
MS B
P CM _DIN
Figure 18: Primary Mode Timing
I/O
Description
DI
PCM data input
DO
PCM data output
PCM data frame
IO
synchronization
IO
PCM clock
OD
I2C serial clock for an
125us
2
2 5 5
LS B
LS B
Comment
1.8V power domain
If unused, keep it open
1.8V power domain
If unused, keep it open
1.8V power domain .
In master mode, it serves as an
output signal.
In slave mode, it is used as an
input signal.
If unused, keep it open.
1.8V power domain
In master mode, it serves as an
output signal.
In slave mode, it is used as an
input signal.
If unused, it is recommended to
mount a 33pF capacitor close to
the pin.
An external 1.8V pull-up resistor
UMTS/HSPA+ Module Series
UG89 Hardware Design
2 5 6
MS B
MS B
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