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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SCALE 2:1
E1
2X
0.20 C
D
0.10 C
0.10 C
24X
24
1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
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2X
D
A
24
13
1
12
b
24X
e
B
0.25
A1
SOLDERING FOOTPRINT
24X
0.42
13
12
0.635
PITCH
DIMENSIONS: MILLIMETERS
98AON04474D
QSOP24 NB
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
QSOP24 NB
CASE 492B−01
ISSUE A
0.20 C D
D
C
E
L
DETAIL A
2X 12 TIPS
0.25 C D
C
A-B D
M
h x 45 _
A
H
C
SEATING
DETAIL A
PLANE
24X
1.12
6.40
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped "CONTROLLED COPY" in red.
DATE 06 MAY 2008
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
GAUGE
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PLANE
PROTRUSION.
L2
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH,
PROTRUSIONS, OR GATE BURRS SHALL NOT EX
CEED 0.15 PER SIDE. DIMENSION E1 DOES NOT
INCLUDE INTERLEAD FLASH OR PROTRUSION. IN
C
TERLEAD FLASH OR PROTRUSION SHALL NOT EX
CEED 0.15 PER SIDE. D AND E1 ARE DETERMINED
AT DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
MILLIMETERS
DIM
MIN
MAX
A
1.35
1.75
A1
0.10
0.25
b
0.20
0.30
C
0.19
0.25
D
8.65 BSC
E
6.00 BSC
E1
3.90 BSC
e
0.635 BSC
h
0.22
0.50
L
0.40
1.27
L2
0.25 BSC
M
_
_
M
0
8
GENERIC
MARKING DIAGRAM*
xxxxxxxxx
AWLYWW
xxx
= Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW
= Work Week
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, "G", may
or not be present.
PAGE 1 OF 1
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