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Example:
TACH1 High Byte (0x29) = 0x17
TACH1 Low Byte (0x28) = 0xFF
What is Fan 1 speed in RPM?
Fan 1 TACH Reading = 0x17FF = 6143 (decimal)
RPM = (f × 60)/Fan 1 TACH Reading
RPM = (90,000 × 60)/6143
Fan Speed = 879 RPM
TACH Pulses per Revolution
Different fan models can output either one, two, three, or
four TACH pulses per revolution. Once the number of fan
TACH pulses has been determined, it can be programmed
into the TACH Pulses per Revolution Register (0x7B) for
each fan. Alternatively, this register can be used to determine
the number of pulses per revolution output by a given fan.
By plotting fan speed measurements at 100% speed with
different pulses per revolution settings, the smoothest graph
with the lowest ripple determines the correct pulses per
revolution value.
Table 37. FAN PULSES PER REVOLUTION
REGISTER (REG. 0x7B)
Bit
Mnemonic
[1:0]
FAN1 Default
[3:2]
FAN2 Default
[5:4]
FAN3 Default
[7:6]
FAN4 Default
Table 38. FAN PULSES PER REVOLUTION
REGISTER BIT VALUES
Value
00
01
10
11
Fan Spin-up
The ADT7476A has a unique fan spin-up function. It
spins the fan at 100% PWM duty cycle until two TACH
pulses are detected on the TACH input. Once two TACH
pulses have been detected, the PWM duty cycle goes to the
expected running value, for example, 33%. Fans have
different spin-up characteristics and take different times to
overcome inertia. The advantage of the ADT7476A is that
it runs the fans just fast enough to overcome inertia and is
quieter on spin-up than fans that are programmed to spin up
for a given time.
Fan Startup Timeout
To prevent the generation of false interrupts as a fan spins
up (because it is below running speed), the ADT7476A
includes a fan startup timeout function. During this time, the
ADT7476A looks for two TACH pulses. If two TACH
pulses are not detected, an interrupt is generated.
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ADT7476A
Description
2 Pulses per Revolution
2 Pulses per Revolution
2 Pulses per Revolution
2 Pulses per Revolution
Description
1 Pulse per Revolution
2 Pulses per Revolution
3 Pulses per Revolution
4 Pulses per Revolution
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Fan startup timeout can be disabled by setting Bit 5
(FSPDIS) of Configuration Register 1 (0x40).
Table 39. PWM1 TO PWM3 CONFIGURATION
(REG. 0x5C TO 0x5E)
Bit
Mnemonic
[2:0]
SPIN
These Bits Control the Startup
Timeout for PWM1 (0x5C),
PWM2 (0x5D), PWM3 (0x5E).
Disabling Fan Startup Timeout
Although fan startup makes fan spin-ups much quieter
than fixed-time spin-ups, the option exists to use fixed
spin-up times. Setting Bit 5 (FSPDIS) to 1 in Configuration
Register 1 (0x40) disables the spin-up for two TACH pulses.
Instead, the fan spins up for the fixed time as selected in
Register 0x5C to Register 0x5E.
PWM Logic State
The PWM outputs can be programmed high for 100%
duty cycle (non-inverted) or low for 100% duty cycle
(inverted).
Table 40. PWM1 TO PWM3 CONFIGURATION
(REG. 0x5C TO 0x5E) BITS
Bit
Mnemonic
[4]
INV
0 = Logic High for 100% PWM Duty
1 = Logic Low for 100% PWM Duty
Low Frequency Mode PWM Drive Frequency
The PWM drive frequency can be adjusted for the
application. Register 0x5F to Register 0x61 configure the
PWM frequency for PWM1 to PWM3, respectively.
Table 41. PWM FREQUENCY REGISTERS
(REG. 0x5F TO 0x61)
Bit
Mnemonic
[2:0]
FREQ
000 = 11.0 Hz
001 = 14.7 Hz
010 = 22.1 Hz
011 = 29.4 Hz
100 = 35.3 Hz (Default)
101 = 44.1 Hz
110 = 58.8 Hz
111 = 88.2 Hz
High Frequency Mode PWM Drive
Setting Bit 3 of Register 0x5F, Register 0x60, and
Register 0x61 enables high frequency mode for Fan 1,
Fan 2, and Fan 3 respectively.
32
Description
000 = No Startup Timeout
001 = 100 ms
010 = 250 ms (Default)
011 = 400 ms
100 = 667 ms
101 = 1 s
110 = 2 s
111 = 4 s
Description
Cycle
Cycle
Description
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