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Table 49. ADT7476A REGISTERS
Addr
R/W
0x7A
R/W
0x7B
R/W
0x7C
R/W
0x7D
R/W
0x7E
R
0x7F
R
Table 50. REGISTER 0x10 − CONFIGURATION REGISTER 6 (POWER-ON DEFAULT = 0x00)
Bit No.
Mnemonic
[0]
SlowFan
Remote 1
[1]
SlowFan
Local
[2]
SlowFan
Remote 2
[3]
THERM in
Manual
[4]
SlaveEn
[5]
MasterEn
[6]
V
CCP
[7]
ExtraSlow
1. A THERM event always overrides any fan setting (even when fans are disabled).
2. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to this register fail.
Table 51. REGISTER 0x11 − CONFIGURATION REGISTER 7 (POWER-ON DEFAULT = 0x00)
Bit No.
Mnemonic
[0]
DisTHERM
Hys
[7:1]
Reserved
1. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to this register fail.
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(continued)
Desc
Bit 7
Bit 6
THERM Timer
LIMT
LIMT
Limit
TACH Pulses
FAN4
FAN4
per Revolution
Configuration
R2
Local
Register 5
THERM
THERM
Configuration
BpAtt
BpAtt
Register 4
12 V
5.0 V
Test 1
Test 2
R/W
R/W
When this bit is set, Fan 1 smoothing times are multiplied x4 for Remote 1 temperature
channel (as defined in Register 0x62).
R/W
When this bit is set, Fan 2 smoothing times are multiplied x4 for local temperature channel
(as defined in Register 0x63).
R/W
When this bit is set, Fan 3 smoothing times are multiplied x4 for Remote 2 temperature
channel (as defined in Register 0x63).
R/W
When this bit is set, THERM is enabled in manual mode. (Note 1)
R/W
Setting this bit configures the ADT7476A as a slave for use in fan sync mode.
R/W
Setting this bit configures the ADT7476A as a master for use in fan sync mode.
Low
R/W
V
Low = 1. When the power is supplied from 3.3 V STANDBY and the core voltage (V
CCP
drops below its V
Status Bit 1 in Interrupt Status Register 1 is set.
SMBALERT is generated, if enabled.
PROCHOT monitoring is disabled.
Everything is re-enabled once V
above the low limit:
PROCHOT monitoring is enabled.
Fans return to their programmed state after a spin-up cycle.
R/W
When this bit is set, all fan smoothing times are increased by a further 39.2%
R/W
Read/Write
Setting This Bit to 1 Disables THERM Hysteresis
N/A
Reserved. Do Not Write to These Bits
ADT7476A
Bit 5
Bit 4
Bit 3
LIMT
LIMT
LIMT
FAN3
FAN3
FAN2
R1
VID/
GPIO6P
GPIO6D
THERM
GPIO
BpAtt
BpAtt
Max
THERM
V
2.5 V
Speed
CCP
on
THERM
DO NOT WRITE TO THESE REGISTERS
DO NOT WRITE TO THESE REGISTERS
Description
low limit value (Register 0x46), the following occurs:
CCP
increases above the V
CCP
Description
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52
Bit 2
Bit 1
Bit 0
LIMT
LIMT
LIMT
FAN2
FAN1
FAN1
Temp
2sC
Offset
PIN14
PIN14
Disable
FUNC
FUNC
(Note 1 and 2)
low limit.When V
CCP
(Note 1)
De-
Lock-
fault
able
0x00
−
0x55
−
0x01
Yes
0x00
Yes
0x00
Yes
0x00
Yes
)
CCP
increases
CCP
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