ON Semiconductor ADT7476AARQZ-R Manual page 62

Table 73. XNOR TREE TEST ENABLE
Register Address
0x6F
[0]
[7:1]
1. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 74. REMOTE 1 TEMPERATURE OFFSET
Register Address
0x70
[7:0]
1. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 75. LOCAL TEMPERATURE OFFSET
Register Address
0x71
[7:0]
1. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 76. REMOTE 2 TEMPERATURE OFFSET
Register Address
0x72
[7:0]
1. This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from
ADT7476A
(Note 1)
R/W
R/W XNOR tree test enable register.
XEN If the XEN bit is set to 1, the device enters the XNOR
tree test mode. Clearing the bit removes the device from
the XNOR tree test mode.
Reserved Unused. Do not write to these bits.
(Note 1)
R/W
R/W Remote 1 temperature offset.
R/W Allows a temperature offset to be automatically applied
to the Remote Temperature 1 channel measurement.
Bit 1 of Configuration Register 5 (0x7C) determines the
range and resolution of this register.
(Note 1)
R/W
R/W Local temperature offset.
R/W Allows a temperature offset to be automatically applied to
the local temperature measurement. Bit 1 of Configuration
Register 5 (0x7C) determines the range and resolution of
this register.
(Note 1)
R/W
R/W Remote 2 temperature offset.
R/W Allows a temperature offset to be automatically applied
to the Remote Temperature 2 channel measurement.
Bit 1 of Configuration Register 5 (0x7C) determines the
range and resolution of this register.
www.onsemi.com
Description
Description
Description
Description
62
Power-On Default
0x00
Power-On Default
0x00
Power-On Default
0x00
Power-On Default
0x00