ON Semiconductor ADT7476AARQZ-R Manual page 57

Table 65. PWM CONFIGURATION REGISTERS
Register Address
0x5C
0x5D
0x5E
Bit No. Name
[2:0] SPIN
[3] RES
[4] INV
[7:5] BHVR
1. These registers become read-only when the Configuration Register 1 Lock bit is set to 1. Any subsequent attempts to write to these registers fail.
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ADT7476A
(Note 1)
R/W Description
R/W PWM1 Configuration
R/W PWM2 Configuration
R/W PWM3 Configuration
R/W
R/W These bits control the startup timeout for PWMx. The PWM output stays high until two valid
TACH rising edges are seen from the fan. If there is not a valid TACH signal during the fan
TACH measurement directly after the fan startup timeout period, the TACH measurement
reads 0xFFFF and Interrupt Status Register 2 reflects the fan fault. If the TACH minimum
high and low bytes contain 0xFFFF or 0x0000, the Interrupt Status Register 2 bit is not set,
even if the fan has not started.
000 = No Startup Timeout
001 = 100 ms
010 = 250 ms (Default)
011 = 400 ms
100 = 667 ms
101 = 1 sec
110 = 2 sec
111 = 4 sec
N/A Reserved. Do not write to this bit.
R/W This bit inverts the PWM output. The default is 0, which corresponds to a logic high output for
100% duty cycle. Setting this bit to 1 inverts the PWM output, so 100% duty cycle
corresponds to a logic low output.
R/W These bits assign each fan to a particular temperature sensor for localized cooling.
000 = Remote 1 Temperature Controls PWMx (Automatic Fan Control Mode)
001 = Local Temperature Controls PWMx (Automatic Fan Control Mode)
010 = Remote 2 Temperature Controls PWMx (Automatic Fan Control Mode)
011 = PWMx Runs Full Speed (Default)
100 = PWMx Disabled
101 = Fastest Speed Calculated by Local and Remote 2 Temperature Controls PWMx
110 = Fastest Speed Calculated by All Three Temperature Channel Controls PWMx
111 = Manual Mode. PWM Current Duty Cycle Registers (0x30 to 0x32) Become Writable
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Description
57
Power-On Default
0x62
0x62
0x62