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ON Semiconductor ADT7476AARQZ-R Manual

Remote thermal controller and voltage monitor

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ADT7476A
Remote Thermal Controller
and Voltage Monitor
The ADT7476A controller is a thermal monitor and multiple PWM
fan controller for noise-sensitive or power-sensitive applications
requiring active system cooling. The ADT7476A can drive a fan using
either a low or high frequency drive signal and can monitor the
temperature of up to two remote sensor diodes plus its own internal
temperature. The part also measures and controls the speed of up to
four fans, so the fans operate at the lowest possible speed for minimum
acoustic noise.
The automatic fan speed control loop optimizes fan speed
for a given temperature. The effectiveness of the system's thermal
solution can be monitored using the THERM input. The ADT7476A
also provides critical thermal protection to the system using the
bidirectional THERM pin as an output to prevent system or
component overheating.
Features
Monitors Up to Five Voltages
Improved TACH and PWM Performance
Controls and Monitors Up to Four Fans
High and Low Frequency Fan Drive Signal
One On-Chip and Two Remote Temperature Sensors
Extended Temperature Measurement Range Up to 191°C
Automatic Fan Speed Control Mode Controls System Cooling Based
on Measured Temperature
Enhanced Acoustic Mode Dramatically Reduces User Perception of
Changing Fan Speeds
Thermal Protection Feature via THERM Output
Monitors Performance Impact of Intel
Thermal Control Circuit via THERM Input
3-wire and 4-wire Fan Speed Measurement
Limit Comparison of All Monitored Values
5.0 V Support on all TACH and PWM Channels
Meets SMBus 2.0 Electrical Specifications
This Device is Pb-Free, Halogen Free and is RoHS Compliant
© Semiconductor Components Industries, LLC, 2016
February, 2016 − Rev. 7
Arrow.com.
Downloaded from
®
®
Pentium
4 Processor
1
www.onsemi.com
QSOP−24 NB
CASE 492B
PIN ASSIGNMENT
SDA
1
SCL
2
GND
3
V
4
CC
VID0/GPIO0
5
VID1/GPIO1
6
ADT7476A
VID2/GPIO2
7
(Top View)
VID3/GPIO3
8
TACH3
9
PWM2/
10
SMBALERT
11
TACH1
TACH2
12
*TACH4/THERM/SMBALERT/GPIO6/ADDR SELECT
MARKING DIAGRAMS
ADT7476AARQZ
#YYWW
xxxx
ADT7476AARQZ = Specific Device Code
#
= Pb-Free Package
YYWW
= Date Code
xxxx
= Assembly Lot Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 68 of this data sheet.
Publication Order Number:
24
PWM1/XTO
23
V
CCP
+2.5V
/THERM
22
IN
21
+12V
/VID5
IN
20
+5V
IN
VID4/GPIO4
19
D1+
18
D1−
17
D2+
16
D2−
15
*
14
13
PWM3/ADDREN
ADT7476A/D

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Summary of Contents for ON Semiconductor ADT7476AARQZ-R

  • Page 1 ADT7476A Remote Thermal Controller and Voltage Monitor The ADT7476A controller is a thermal monitor and multiple PWM fan controller for noise-sensitive or power-sensitive applications requiring active system cooling. The ADT7476A can drive a fan using www.onsemi.com either a low or high frequency drive signal and can monitor the temperature of up to two remote sensor diodes plus its own internal temperature.
  • Page 2 ADT7476A ADDR ADDREN SELECT SMBALERT ADT7476A VID5/GPIO5 VID4/GPIO4 SMBus VID3/GPIO3 SERIAL BUS VID/GPIO ADDRESS VID2/GPIO2 INTERFACE REGISTER SELECTION VID1/GPIO1 VID0/GPIO0 ADDRESS GPIO6 POINTER REGISTER PWM1 PWM REGISTERS AUTOMATIC PWM2 AND CONTROLLERS FAN SPEED (HF AND LF) CONTROL PWM3 CONFIGURATION REGISTERS TACH1 TACH2 FAN SPEED...
  • Page 3 ADT7476A Table 1. ABSOLUTE MAXIMUM RATINGS Parameter Rating Unit Positive Supply Voltage (V Maximum Voltage on +12V Maximum Voltage on +5.0V 6.25 Maximum Voltage on SDA, SCL, THERM (Pin 22) and GPIO1−5 Pins Maximum Voltage on all Tach and PWM Pins +5.5 Voltage on Remaining Input or Output Pins −0.3 to +4.2...
  • Page 4 ADT7476A Table 3. ELECTRICAL CHARACTERISTICS (continued) to T to V , unless otherwise noted) (Note 1) Parameter Conditions Unit Fan RPM-to-Digital Converter 0°C ≤ T ≤ 70°C ±6 Accuracy − − −40°C ≤ T ≤ +120°C ±10 − − Full-Scale Count −...
  • Page 5 ADT7476A Table 4. PIN ASSIGNMENT Pin No. Mnemonic Description Digital I/O (Open Drain). SMBus bidirectional serial data. Requires SMBus pullup. Digital Input (Open Drain). SMBus serial clock input. Requires SMBus pullup. Ground Pin. Power Supply. Powered by 3.3 V standby, if monitoring in low power states is required. V is also monitored through this pin.
  • Page 6: Typical Performance Characteristics

    ADT7476A TYPICAL PERFORMANCE CHARACTERISTICS −10 −20 D+ To GND −30 D+ To V −10 −40 −20 −50 −30 −60 −40 12 14 16 18 20 22 CAPACITANCE (nF) LEAKAGE RESISTANCE (MW) Figure 3. Temperature Error vs. Capacitance Figure 4. Remote Temperature Error vs. PCB Between D+ and D−...
  • Page 7: Frequency (Hz)

    ADT7476A TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d) 250 mV −2 100 mV −4 −6 −0.5 −8 −1.0 −10 −1.5 −12 −40 −20 105 125 100M 200M 300M 400M 500M 600M OIL BATH TEMPERATURE (°C) FREQUENCY (Hz) Figure 9. Remote Temperature Error vs. Power Figure 10.
  • Page 8 ADT7476A • Product Description The ADT7476A does not support full shutdown mode. The ADT7476A is a complete thermal monitor and • The ADT7476A offers increased temperature accuracy multiple fan controller for any system requiring thermal on all temperature channels. monitoring and cooling. The device communicates with the •...
  • Page 9 ADT7476A Serial Bus Interface Control of the ADT7476A is carried out using the serial ADT7476A 10 kW system management bus (SMBus). The ADT7476A is connected to this bus as a slave device, under the control of ADDR SELECT a master controller. The ADT7476A has a 7-bit serial bus PWM3/ DO NOT LEAVE ADDREN address.
  • Page 10 ADT7476A clock pulse to assert a stop condition. In read 1. If the ADT7476A’s address pointer register value mode, the master device overrides the is unknown, or not the desired value, then it must acknowledge bit by pulling the data line high first be set to the correct value before data can be during the low period before the ninth clock pulse.
  • Page 11 ADT7476A START BY ACK. BY NO ACK. BY STOP BY ADT7476A MASTER MASTER MASTER FRAME 1 FRAME 2 SERIAL BUS ADDRESS BYTE DATA BYTE FROM ADT7476A Figure 20. Reading Data from a Previously Selected Register Write Operations 2. The master sends the 7-bit slave address followed The SMBus specification defines several protocols for by the write bit (low).
  • Page 12 ADT7476A Alert Response Address through the V pin (Pin 4). The 2.5 V input can be used to Alert response address (ARA) is a feature of SMBus monitor a chipset supply voltage in computer systems. devices, allowing an interrupting device to identify itself to Analog-to-Digital Converter the host when multiple devices exist on the same bus.
  • Page 13 ADT7476A Voltage Limit Registers Table 9. CONVERSION TIME WITH AVERAGING Associated with each voltage measurement channel is a DISABLED high and low limit register. Exceeding the programmed high Channel Measurement Time (ms) or low limit causes the appropriate status bit to be set. Voltage Channels Exceeding either limit can also generate SMBALERT interrupts.
  • Page 14 ADT7476A 1. In the process of configuring single-channel ADC conversion In this mode, the ADT7476A can only read a single voltage mode, the TACH1 minimum high byte is also changed, possibly channel. The selected voltage input is read every 0.7 ms. The trading off TACH1 minimum high byte functionality with appropriate ADC channel is selected by writing to Bits [7:5] single-channel mode functionality.
  • Page 15 ADT7476A Table 13. 10-BIT ADC OUTPUT CODE VS. V Input Voltage ADC Output 12 V 5.0 V (3.3 V 2.5 V Decimal Binary (10 Bits) <0.0156 <0.0065 <0.0042 <0.0032 <0.00293 <0.00220 00000000 00 0.0156 to 0.0065 to 0.0042 to 0.0032 to 0.0293 to 0.00220 to 00000000 01...
  • Page 16 ADT7476A VID Code Monitoring VID Code Change Detect Function The ADT7476A has five dedicated voltage ID (VID code) The ADT7476A has a VID code change detect function. inputs. These are digital inputs that can be read back through When Pin 21 is configured as the VID5 input, VID code the VID/GPIO register (0x43) to determine the processor changes are detected and reported back by the ADT7476A.
  • Page 17: Low Pass Filter

    ADT7476A Remote Temperature Measurement Table 14. TWOS COMPLEMENT TEMPERATURE DATA The ADT7476A can measure the temperature of two FORMAT remote diode sensors or diode-connected transistors Temperature Digital Output (10-bit) (Note 1) connected to Pin 17 and Pin 18, or Pin 15 and Pin 16. –128°C 1000 0000 00 (Diode Fault) The forward voltage of a diode or diode-connected...
  • Page 18 ADT7476A To reduce the error due to variations in both substrate and ADT7476A discrete transistors, a number of factors should be taken into 2N3904 consideration: • D− The ideality factor, n , of the transistor is a measure of the deviation of the thermal diode from ideal behavior. Figure 26.
  • Page 19 ADT7476A and null it out using the offset registers. The offset registers Table 19. TEMPERATURE LIMIT REGISTERS automatically add a twos complement 8-bit reading to every Register Description Default temperature measurement. 0x4E Remote 1 Temperature Low Limit 0x81 Changing Bit 1 of Configuration Register 5 (0x7C) changes the resolution and therefore, the range of the 0x4F Remote 1 Temperature High Limit...
  • Page 20 ADT7476A Single-channel ADC Conversions Limits, Status Registers, and Interrupts Setting Bit 6 of Configuration Register 2 (0x73) places Limit Values the ADT7476A into single-channel ADC conversion mode. Associated with each measurement channel on the In this mode, the ADT7476A can be made to read a single ADT7476A are high and low limits.
  • Page 21 ADT7476A 11 ) ) 12 ) ( 2 39 ) + 145 ms (eq. 3) Table 27. FAN LIMIT REGISTERS Register Description Default 0x54 TACH1 Minimum Low Byte 0xFF 0x55 TACH1 Minimum High Byte 0xFF 0x56 TACH2 Minimum Low Byte 0xFF 0x57 TACH2 Minimum High Byte...
  • Page 22: High Limit

    ADT7476A Fan TACH measurements are made in parallel and are not Table 29. INTERRUPT STATUS REGISTER 2 (0x42) synchronized with the analog measurements in any way. Mnemonic Description Status Registers 1 indicates an open or short on The results of limit comparisons are stored in Interrupt D2+/D2−...
  • Page 23 ADT7476A Note that: the SMBALERT output and status bits to behave • as shown in Figure 30. The SMBALERT output remains low for the entire duration that a reading is out-of-limit and until the HIGH LIMIT status register has been read. This has implications on how software handles the interrupt.
  • Page 24 ADT7476A If THERM is enabled on Bit 1, Configuration Register 3 Table 30. INTERRUPT MASK REGISTER 1 (0x74) (0x78): Mnemonic Description • Pin 22 becomes THERM. • 1 masks SMBALERT for any alert If Pin 14 is configured as THERM on Bit 0 and Bit 1 of condition flagged in Interrupt Status Configuration Register 4 (0x7D), THERM is enabled Register 2.
  • Page 25 ADT7476A THERM Timer When using the THERM timer, be aware of the following: The ADT7476A has an internal timer to measure THERM After a THERM timer read (0x79) assertion time. For example, the THERM input can be 1. The contents of the timer are cleared on read. ®...
  • Page 26 ADT7476A 2.914 s 2.914 s 1.457 s 1.457 s 728.32 ms 728.32 ms THERM LIMIT THERM TIMER 364.16 ms 364.16 ms (REG. 0x7A) 182.08 ms 182.08 ms (REG. 0x79) 91.04 ms 91.04 ms 45.52 ms 45.52 ms 22.76 ms 22.76 ms THERM 0 1 2 3 4 5 6 7 THERM TIMER CLEARED ON READ...
  • Page 27 ADT7476A below the thermal limit. Because the temperature for that Additionally, Bit 3 of Configuration Register 4 (0x7D) channel is measured only once for every monitoring cycle, can be used to select the PWM speed on a THERM event after THERM asserts, it is guaranteed to remain low for at (100% or maximum PWM).
  • Page 28 ADT7476A Figure 35 uses a 10 kW pullup resistor for the TACH should be taken in designing drive circuits with transistors signal. This assumes that the TACH signal is an and FETs to ensure that the PWM outputs are not required open-collector from the fan.
  • Page 29 ADT7476A Laying Out 3-Wire Fans 12 V Figure 40 shows how to lay out a common circuit arrangement for 3-wire fans. PULLUP ADT7476A 4.7 kW TACH 12 V or 5 V OUTPUT TACH FAN SPEED COUNTER ZD1* 1N4148 3.3 V or 5 V *CHOOSE ZD1 VOLTAGE APPROXIMATELY 0.8 ×...
  • Page 30 ADT7476A The fan counter does not count the fan TACH output 0xFFFF indicates that either the fan has stalled or is running pulses directly because the fan speed could be less than very slowly (<100 RPM). 1,000 RPM, and it takes several seconds to accumulate a High Limit: >...
  • Page 31 ADT7476A where Fan TACH Reading is the 16-bit fan tachometer reading. www.onsemi.com Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
  • Page 32 ADT7476A Example: Fan startup timeout can be disabled by setting Bit 5 (FSPDIS) of Configuration Register 1 (0x40). TACH1 High Byte (0x29) = 0x17 TACH1 Low Byte (0x28) = 0xFF Table 39. PWM1 TO PWM3 CONFIGURATION (REG. 0x5C TO 0x5E) What is Fan 1 speed in RPM? Mnemonic Description...
  • Page 33 ADT7476A In high frequency mode, the PWM drive frequency is By reading the PWMx current duty cycle registers, the always 22.5 kHz. When high frequency mode is enabled, the user can keep track of the current duty cycle on each PWM dc bits are automatically asserted internally and do not need output, even when the fans are running in automatic fan to be changed.
  • Page 34 ADT7476A THERM Operation in Manual Mode a given fan, are critical, because they define the thermal In manual mode, if the temperature increases above the characteristics of the system. The thermal validation of the programmed THERM temperature limit, the fans system is one of the most important steps in the design automatically speed up to maximum PWM or 100% PWM, process, so these values should be selected carefully.
  • Page 35 ADT7476A Step 1 − Hardware Configuration 2. How many fans are supported in system, three or During system design, the motherboard sensing and four? control capabilities should be addressed early in the design This influences the choice of whether to use the stages.
  • Page 36 ADT7476A • Recommended Implementation 1 5.0 V measurement input. Configuring the ADT7476A as shown in Figure 49 • VRM temperature using local temperature sensor. provides the system designer with the following features: • CPU temperature measured using the Remote 1 •...
  • Page 37: Ambient Temperature

    ADT7476A • Recommended Implementation 2 5.0 V measurement input. Configuring the ADT7476A as shown in Figure 50 • VRM temperature using local temperature sensor. provides the system designer with the following features: • CPU temperature measured using the Remote 1 •...
  • Page 38 ADT7476A Step 2 − Configuring the Mux Automatic Fan Control Mux Options After the system hardware configuration is determined, [7:5] (BHVR), Register 0x5C, Register 0x5D, the fans can be assigned to particular temperature channels. Register 0x5E. Not only can fans be assigned to individual channels, but the 000 = Remote 1 temperature controls PWMx behavior of the fans is also configurable.
  • Page 39 ADT7476A Mux Configuration Example Example Mux Settings This is an example of how to configure the mux in a [7:5] (BHVR), PWM1 Configuration Register (0x5C). system using the ADT7476A to control three fans. The CPU 101 = Fastest speed calculated by local and Remote 2 fan sink is controlled by PWM1, the front chassis fan is temperature controls PWM1 controlled by PWM2, and the rear chassis fan is controlled...
  • Page 40 ADT7476A Step 3 − T Settings for Thermal Calibration Table 44. T REGISTERS Channels Register Description Default is the temperature at which the fans start to turn on under automatic fan control. The speed at which the fan runs 0x67 Remote 1 Temperature T 0x5A (90°C) at T...
  • Page 41 ADT7476A Step 4 − PWM for Each PWM (Fan) Output The value to be programmed into the PWM register is is the minimum PWM duty cycle at which each given by: fan in the system runs. It is also the start speed for each fan Value (decimal) = PWM /0.39 under automatic fan control once the temperature rises...
  • Page 42 ADT7476A Programming the PWM Maximum Duty Cycle example, 70°C is reached when the fans are Registers running at 50% PWM duty cycle. The PWM maximum duty cycle registers are 8-bit 3. Determine the slope of the required control loop to registers that allow the maximum PWM duty cycle for each meet these requirements.
  • Page 43 ADT7476A Selecting T Figure 61 shows PWM duty cycle vs. temperature for RANGE The T value can be selected for each temperature each T setting. The lower graph shows how each RANGE RANGE channel: Remote 1, Local, and Remote 2 temperature. setting affects fan speed vs.
  • Page 44 ADT7476A VRM TEMP. 2.55C 3.335C 6.675C CPU TEMPERATURE 105C 13.35C AMBIENT TEMPERATURE 165C 205C 26.65C 325C 405C 53.35C 805C TEMPERATURE ABOVE T TEMPERATURE ABOVE T VRM TEMP. 2.55C 3.335C 6.675C CPU TEMPERATURE AMBIENT TEMPERATURE 105C 13.35C 165C 205C 26.65C 325C 405C 53.35C 805C...
  • Page 45 ADT7476A Hysteresis Registers Table 48. THERM LIMIT REGISTERS Register 0x6D, Remote 1, Local Temperature Hysteresis Register Description Default [7:4], Remote 1 temperature hysteresis (4°C default). 0x6A Remote 1 THERM Limit 0x64 (100°C) [3:0], Local temperature hysteresis (4°C default). 0x6B Local THERM Limit 0x64 (100°C) 0x6C Remote 2 THERM Limit...
  • Page 46 ADT7476A Step 8 − T for Temperature Channels hysteresis value, described in Step 6 - T HYST THERM RANGE is the amount of extra cooling a fan provides after Temperature Channels. Therefore, programming HYST the temperature measured has dropped back below T Register 0x6D and Register 0x6E sets the hysteresis for before the fan turns off.
  • Page 47 ADT7476A Enhance Acoustics Register 1 (0x62) 000 = 37.5 sec 001 = 18.8 sec Bit 7 (MIN3) = 0, PWM3 is off (0% PWM duty cycle) when 010 = 12.5 sec temperature is below T − T HYST 011 = 7.5 sec Bit 7 (MIN3) = 1, PWM3 runs at PWM3 minimum duty cycle 100 = 4.7 sec below T...
  • Page 48 ADT7476A Fan Sync Figure 66 shows the signals that are exercised in the When two ADT7476As are used in a system, it is possible XNOR tree test mode. to synchronize them so that one PWM channel from each VID0 device can be effectively OR’ed together to create a PWM VID1 output that reflects the maximum speed of the two OR’ed PWMs.
  • Page 49 ADT7476A Register Tables Table 49. ADT7476A REGISTERS Lock- Addr Desc Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 fault able 0x10 Configuration Extra Master SlaveEn THERM SlowFan SlowFan SlowFan 0x00 Register 6 Slow Remote Local...
  • Page 50 ADT7476A Table 49. ADT7476A REGISTERS (continued) Lock- Addr Desc Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 fault able 0x41 Interrupt Status 5.0 V 2.5 V/ 0x00 − Register 1 THERM 0x42 Interrupt Status FAN3 FAN2...
  • Page 51 ADT7476A Table 49. ADT7476A REGISTERS (continued) Lock- Addr Desc Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 fault able 0x60 Local RANGE RANGE RANGE RANGE HF/LF FREQ FREQ FREQ 0XC4 /PWM2 RANGE Frequency 0x61 Remote 2...
  • Page 52 ADT7476A Table 49. ADT7476A REGISTERS (continued) Lock- Addr Desc Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 fault able 0x7A THERM Timer LIMT LIMT LIMT LIMT LIMT LIMT LIMT LIMT 0x00 − Limit 0x7B TACH Pulses...
  • Page 53 ADT7476A Table 52. VOLTAGE READING REGISTERS (POWER-ON DEFAULT = 0x00) (Note 1) Register Address Description 0x20 Read-only Reflects the Voltage Measurement at the 2.5 V Input on Pin 22 (8 MSBs of Reading) 0x21 Read-only Reflects the Voltage Measurement (Note 2) at the V Input on Pin 23 (8 MSBs of Reading) 0x22 Read-only...
  • Page 54 ADT7476A Table 56. PWM MAXIMUM DUTY CYCLE (POWER-ON DEFAULT = 0xFF) (Note 1 and 2) Register Address Description 0x38 Maximum Duty Cycle for PWM1 Output, Default = 100% (0xFF) 0x39 Maximum Duty Cycle for PWM2 Output, Default = 100% (0xFF) 0x3A Maximum Duty Cycle for PWM3 Output, Default = 100% (0xFF) 1.
  • Page 55 ADT7476A Table 59. REGISTER 0x42 − INTERRUPT STATUS REGISTER 2 (POWER-ON DEFAULT = 0x00) Bit No. Mnemonic Description 12 V/VC Read-only A 1 indicates that the 12 V high or low limit has been exceeded. This bit is cleared on a read of the status register only if the error condition has subsided.
  • Page 56 ADT7476A Table 62. TEMPERATURE LIMIT REGISTERS (Note 1) Register Address Description (Note 2) Power-On Default 0x4E Remote 1 Temperature Low Limit 0x81 0x4F Remote 1 Temperature High Limit 0x7F 0x50 Local Temperature Low Limit 0x81 0x51 Local Temperature High Limit 0x7F 0x52 Remote 2 Temperature Low Limit...
  • Page 57 ADT7476A Table 65. PWM CONFIGURATION REGISTERS (Note 1) Register Address Description Power-On Default 0x5C PWM1 Configuration 0x62 0x5D PWM2 Configuration 0x62 0x5E PWM3 Configuration 0x62 Bit No. Name Description [2:0] SPIN These bits control the startup timeout for PWMx. The PWM output stays high until two valid TACH rising edges are seen from the fan.
  • Page 58 ADT7476A Table 66. /PWM FREQUENCY REGISTERS (Note 1) RANGE Register Address Description Power-On Default 0x5F Remote 1 T /PWM1 Frequency 0xC4 RANGE 0x60 Local T /PWM2 Frequency 0xC4 RANGE 0x61 Remote 2 T /PWM3 Frequency 0xC4 RANGE Bit No. Name Description [2:0] FREQ...
  • Page 59 ADT7476A Table 67. REGISTER 0x62 − ENHANCED ACOUSTICS REGISTER 1 (POWER-ON DEFAULT = 0x00) (Note 1) Bit No. Mnemonic Description [2:0] ACOU Assuming that PWMx is associated with the Remote 1 temperature channel, these bits define (Note 2) the maximum rate of change of the PWMx output for Remote 1 temperature-related changes. Instead of the fan speed jumping instantaneously to its newly determined speed, it ramps gracefully at the rate determined by these bits.
  • Page 60 ADT7476A Table 68. REGISTER 0x63 − ENHANCED ACOUSTICS REGISTER 2 (POWER-ON DEFAULT = 0x00) (Note 1) Bit No. Mnemonic Description [2:0] ACOU3 Assuming that PWMx is associated with the local temperature channel, these bits define the maximum rate of change of the PWMx output for local temperature-related changes. Instead of the fan speed jumping instantaneously to its newly determined speed, it ramps gracefully at the rate determined by these bits.
  • Page 61 ADT7476A Table 69. PWM MINIMUM DUTY CYCLE REGISTERS (Note 1) Register Address Description Power-On Default 0x64 PWM1 Minimum Duty Cycle 0x80 (50% Duty Cycle) 0x65 PWM2 Minimum Duty Cycle 0x80 (50% Duty Cycle) 0x66 PWM3 Minimum Duty Cycle 0x80 (50% Duty Cycle) Bit No.
  • Page 62 ADT7476A Table 73. XNOR TREE TEST ENABLE (Note 1) Register Address Description Power-On Default 0x6F XNOR tree test enable register. 0x00 If the XEN bit is set to 1, the device enters the XNOR tree test mode. Clearing the bit removes the device from the XNOR tree test mode.
  • Page 63 ADT7476A Table 77. REGISTER 0x73 − CONFIGURATION REGISTER 2 (POWER-ON DEFAULT = 0x00) (Note 1) Bit No. Mnemonic Description FanPresDT When FanPresenceDT = 1, the state of Bits [3:1] of 0x73 reflects the presence of a 4-wire fan on the appropriate TACH channel. Fan1Detect Read-only Fan1Detect = 1 indicates that a 4-wire fan is connected to the TACH1 input.
  • Page 64 ADT7476A Table 79. REGISTER 0x75 − INTERRUPT MASK REGISTER 2 (POWER-ON DEFAULT [7:0] = 0x00) Bit No. Mnemonic Description 12 V/VC When Pin 21 is configured as a 12 V input, 12 V/VC = 1 masks SMBALERT for out-of-limit conditions on the 12 V channel. When Pin 21 is programmed as VID5, this bit masks an SMBALERT, if the VID5 VID code bit changes.
  • Page 65 ADT7476A Table 82. REGISTER 0x78 − CONFIGURATION REGISTER 3 (POWER-ON DEFAULT = 0x00) (Note 1) Bit No. Mnemonic Description ALERT ALERT = 1, Pin 10 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to indicate out-of-limit error conditions. ALERT = 0, Pin 10 (PWM2/SMBALERT) is configured as the PWM2 output. THERM/ THERM = 1 enables THERM functionality on Pin 22 and Pin 14, if Pin 14 is configured as 2.5V...
  • Page 66 ADT7476A Table 85. REGISTER 0x7B − TACH PULSES PER REVOLUTION REGISTER (POWER-ON DEFAULT = 0x55) Bit No. Mnemonic Description [1:0] FAN1 Sets number of pulses to be counted when measuring Fan 1 speed. Can be used to determine fan pulses per revolution for unknown fan type. Pulses Counted 00 = 1 01 = 2 (Default)
  • Page 67 ADT7476A Table 86. REGISTER 0x7C − CONFIGURATION REGISTER 5 (POWER-ON DEFAULT = 0x01) (Note 1) Bit No. Mnemonic Description 2sC = 1 sets the temperature range to the twos complement temperature range. 2sC = 0 changes the temperature range to the Offset 64 temperature range. When this bit is changed, the ADT7476A interprets all relevant temperature register values as defined by this bit.
  • Page 68 ADT7476A Table 88. REGISTER 0x7E − MANUFACTURER’S TEST REGISTER 1 (POWER-ON DEFAULT = 0x00) Bit No. Mnemonic Description [7:0] Reserved Read-only Manufacturer’s test register. These bits are reserved for manufacturer’s test purposes and should not be written to under normal operation. Table 89.
  • Page 69: Package Dimensions

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  • Page 70 FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized...