Electrical Characteristics - Texas Instruments TRF7970A Manual

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5.4

Electrical Characteristics

TYP operating conditions are T
MIN and MAX operating conditions are over recommended ranges of supply voltage and operating free-air temperature
(unless otherwise noted)
PARAMETER
V Low-level output voltage
OL
V High-level output voltage
OH
I Supply current in power down mode 1
PD1
Supply current in power down mode 2
I
PD2
(sleep mode)
I Supply current in stand-by mode
STBY
Supply current without antenna driver
I
ON1
current
I Supply current, TX (half power)
ON2
I Supply current, TX (full power)
ON3
V Power-on-reset voltage
POR
V Bandgap voltage (pin 11)
BG
Regulated output voltage for analog
V
DD_A
circuitry (pin 1)
V Regulated supply for external circuitry
DD_X
I Maximum output current of V
VDD_Xmax
R Antenna driver output resistance
RFOUT
R RX_IN1 and RX_IN2 input resistance
RFIN
Maximum RF input voltage at RX_IN1
V
RF_INmax
and RX_IN2
Minimum RF input voltage at RX_IN1
V
RF_INmin
and RX_IN2 (input sensitivity)
f SYS_CLK frequency
SYS_CLK
f Carrier frequency
C
t Crystal run-in time
CRYSTAL
f Maximum DATA_CLK frequency
D_CLKmax
R Output resistance I/O_0 to I/O_7
OUT
R Output resistance R
SYS_CLK
(1) Antenna driver output resistance
(2) Measured with subcarrier signal at RX_IN1 or RX_IN2 and measured the digital output at MOD pin with register 0x1A bit 6 = 1.
(3) Depends on the crystal parameters and components
(4) TI recommends a DATA_CLK speed of 2 MHz. Higher data clock depends on the capacitive load. Maximum SPI clock speed should not
exceed 10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output
resistance of 400 Ω (12-ns time constant when 30-pF load used).
Copyright © 2011–2017, Texas Instruments Incorporated
= 25°C, VIN = 5 V, full-power mode (unless otherwise noted)
A
All building blocks disabled, including
supply-voltage regulators; measured after
500-ms settling time (EN = 0, EN2 = 0)
The SYS_CLK generator and V
remain active to support external circuitry;
measured after 100-ms settling time
(EN = 0, EN2 = 1)
Oscillator running, supply-voltage
regulators in low-consumption mode
(EN = 1, EN2 = x)
Oscillator, regulators, RX and AGC
active, TX is off
Oscillator, regulators, RX and AGC and
TX active, P
Oscillator, regulators, RX and AGC and
TX active, P
Input voltage at V
Internal analog reference voltage
V = 5 V
IN
Output voltage pin 32, V
Output current pin 32, V
DD_X
Half-power mode, V
(1)
Full-power mode, V
V
RF_INmax
f
SUBCARRIER
(2)
f
SUBCARRIER
In power mode 2, EN = 0, EN2 = 1
Defined by external crystal
Time until oscillator stable bit is set
(register 0x0F)
Depends on capacitive load on the I/O
(4)
lines, TI recommends 2 MHz
SYS_CLK
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SLOS743L – AUGUST 2011 – REVISED MARCH 2017
TEST CONDITIONS
DD_X
= 100 mW
OUT
= 200 mW
OUT
IN
= 5 V
IN
= 5 V
IN
= 2.7 V to 5.5 V
IN
= 2.7 V to 5.5 V
IN
should not exceed V
IN
= 424 kHz
= 848 kHz
(3)
(4)
TRF7970A
TRF7970A
MIN TYP MAX UNIT
0.2 ×
V
V
DD_I/O
0.8 ×
V
V
DD_I/O
0.5 5 µA
120 200 µA
1.9 3.5 mA
10.5 14 mA
70 78 mA
130 150 mA
1.4 2 2.6 V
1.5 1.6 1.7 V
3.1 3.4 3.8 V
3.1 3.4 3.8 V
20 mA
8 12
Ω
4 6
4 10 20 kΩ
3.5 V
1.4 2.5
mV
2.1 3
25 60 120 kHz
13.56 MHz
3 ms
2 4 10 MHz
500 800 Ω
200 400
Ω
Specifications
pp
pp
11