Texas Instruments TRF7970 Manual
Texas Instruments TRF7970 Manual

Texas Instruments TRF7970 Manual

Multiprotocol fully integrated 13.56-mhz rfid and near field communication nfc transceiver ic

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TRF7970A Multiprotocol Fully Integrated 13.56-MHz RFID and Near Field Communication

1 Device Overview

1.1

Features

1
• Supports Near Field Communication (NFC)
Standards NFCIP-1 (ISO/IEC 18092) and NFCIP‑2
(ISO/IEC 21481)
• Completely Integrated Protocol Handling for
ISO15693, ISO18000-3, ISO14443A/B, and
FeliCa™
• Integrated Encoders, Decoders, and Data Framing
for NFC Initiator, Active and Passive Target
Operation for All Three Bit Rates (106 kbps,
212 kbps, 424 kbps) and Card Emulation
• RF Field Detector With Programmable Wake-Up
Levels for NFC Passive Transponder Emulation
Operation
• RF Field Detector for NFC Physical Collision
Avoidance.
• Integrated State Machine for ISO14443A
Anticollision (Broken Bytes) Operation
(Transponder Emulation or NFC Passive Target)
• Input Voltage Range: 2.7 VDC to 5.5 VDC
1.2

Applications

Mobile Devices (Tablets, Handsets)
Secure Pairing ( Bluetooth
Wireless Networks)
Public Transport or Event Ticketing
Passport or Payment (POS) Reader Systems
1.3

Description

The TRF7970A device is an integrated analog front end and data-framing device for a 13.56-MHz RFID
and Near Field Communication (NFC) system. Built-in programming options make the device suitable for a
wide range of applications for proximity and vicinity identification systems.
The device can perform in one of three modes: RFID and NFC reader, NFC peer, or in card emulation
mode. Built-in user-configurable programming options make the device suitable for a wide range of
applications. The TRF7970A device is configured by selecting the desired protocol in the control registers.
Direct access to all control registers allows fine tuning of various reader parameters as needed.
Documentation, reference designs, EVM, and source code TI MSP430™ MCUs or ARM
available.
PART NUMBER
TRF7970ARHB
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Sample &
Product
Buy
Folder
(NFC) Transceiver IC
®
®
, Wi-Fi
, Other Paired
Device Information
Tools &
Technical
Software
Documents
SLOS743K – AUGUST 2011 – REVISED APRIL 2014
• Programmable Output Power: +20 dBm (100 mW),
+23 dBm (200 mW)
• Programmable I/O Voltage Levels From 1.8 VDC
to 5.5 VDC
• Programmable System Clock Frequency Output
(RF, RF/2, RF/4) from 13.56-MHz or 27.12-MHz
Crystal or Oscillator
• Integrated Voltage Regulator Output for Other
System Components (MCU, Peripherals,
Indicators), 20 mA (Max)
• Programmable Modulation Depth
• Dual Receiver Architecture With RSSI for
Elimination of "Read Holes" and Adjacent Reader
System or Ambient In-Band Noise Detection
• Programmable Power Modes for Ultra Low-Power
System Design (Power Down <1 µA)
• Parallel or SPI Interface (With 127-Byte FIFO)
• Temperature Range: –40°C to 110°C
• 32-Pin QFN Package (5 mm x 5 mm)
Short-Range Wireless Communication Tasks
(Firmware Updates)
Product Identification or Authentication
Medical Equipment or Consumables
Access Control, Digital Door Locks
Sharing of Electronic Business Cards
PACKAGE
VQFN (32)
Support &
Reference
Community
Design
TRF7970A
®
MCUs are
BODY SIZE
5 mm x 5 mm

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Summary of Contents for Texas Instruments TRF7970

  • Page 1: Device Overview

    Sample & Support & Reference Product Tools & Technical Community Design Folder Software Documents TRF7970A SLOS743K – AUGUST 2011 – REVISED APRIL 2014 TRF7970A Multiprotocol Fully Integrated 13.56-MHz RFID and Near Field Communication (NFC) Transceiver IC 1 Device Overview Features •...
  • Page 2: Functional Block Diagram

    STATE MACHINE ASK/OOK VSS_RF VOLTAGE SUPPLY REGULATOR SYSTEMS (SUPPLY REGULATORS AND REFERENCE VOLTAGES) VDD_X OSC_IN CRYSTAL OR OSCILLATOR TIMING SYSTEM VSS_D OSC_OUT Figure 1-1. Block Diagram Device Overview Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 3: Table Of Contents

    ..........Glossary ......Receiver – Digital Section Mechanical Packaging and Orderable ........Oscillator Section ..........Information ....... Transmitter – Analog Section ......Packaging Information Table of Contents Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 4: Revision History

    Deleted previous Section 10, System Design, and moved contents to Section 7.3 through Section 7.5 ................• Removed references to figure numbers in Figure 7-3 Revision History Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 5: Device Characteristics

    106, 212, 424, NFC-A/B (ISO14443A/B) NFC-A/B NFC-A NFC-F (JIS: X6319-4) 212, 424 NFC-F 212, 424 NFC-V (ISO15693) 6.7, 26.7 (1) 848 kbps only applies to reader/writer mode. Device Characteristics Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 6: Terminal Configuration And Functions

    32-pin RHB package. VDD_A I/0_7 I/0_6 VDD_RF I/0_5 VDD_PA I/0_4 TX_OUT I/0_3 VSS_PA I/0_2 VSS_RX I/0_1 RX_IN1 I/0_0 Figure 4-1. 32-Pin RHB Package (Top View) Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 7: Terminal Functions

    Chip enable input (If EN = 0, then chip is in sleep or power-down mode). Negative supply for internal digital circuits SS_D (1) SUP = Supply, INP = Input, BID = Bidirectional, OUT = Output Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 8 Internally regulated supply (2.7 V to 3.4 V) for digital circuit and external devices (for example, DD_X MCU) Thermal Pad Chip substrate ground Terminal Configuration and Functions Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 9: Specifications

    Input voltage - logic low EN, EN2, ASK/OOK, MOD DD_I/O I/O lines, IRQ, SYS_CLK, DATA_CLK, 0.8 x Input voltage threshold, logic high EN, EN2, ASK/OOK, MOD DD_I/O Specifications Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 10: Electrical Characteristics

    10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output resistance of 400 Ω (12-ns time constant when 30-pF load used). Specifications Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 11: Handling Ratings

    10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output resistance of 400 Ω (12-ns time constant when 30-pF load used). Specifications Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 12: Detailed Description

    1.8 V to 5.5 V for the MCU I/O interface. The transmitter has selectable output-power levels of 100 mW (+20 dBm) or 200 mW (+23 dBm) equivalent into a 50-Ω load when using a 5-V supply. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 13 This informs the MCU that the chip should start operation as NFC TARGET device. When the first command from the INITIATOR is received another IRQ sent with B6 (RX start) set Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 14 (decoded) data is forwarded to the MCU through the FIFO; SOF, EOF, preamble, sync bytes, CRC, and parity bytes are checked by the framer and discarded. The receiver works same as in the case of an active target. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 15: System Block Diagram

    RF output (to ensure maximum RF power output). The manual mode allows the user to manually configure the regulator settings. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 16 . The "Delta Voltage" in automatic DD_RF DD_A DD_A regulator mode can be increased up to 400 mV (for details, see bits B0 to B2 in register 0x0B). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 17 (pin 29), the RF output stage negative supply is V (pin 6), and the negative supply for SS_D SS_PA the RF receiver V (pin 7). SS_RX Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 18 . This ensures the highest possible supply DD_RF DD_A DD_X voltage for the RF output stage while maintaining an adequate PSRR (power supply rejection ratio). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 19: Power Modes

    (thus unable to control the EN input). A rising edge applied to the EN2 input (which has an approximately 1-V threshold level) starts the reader supply system and 13.56- MHz oscillator (identical to condition EN = 1). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 20 Modes 3 and 4 (active modes with the entire RF section active, bit 5 = 1 of register 0x00) are the normal modes used for normal transmit and receive operations. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 21: Receiver - Analog Section

    AGC from interfering with the reception of the remaining data packet. In certain situations, this AGC freeze is not optimal, so it can be removed by setting B0 = 1 in the RX special setting register (address 0x0A). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 22: Receiver - Digital Section

    With each new write in this register, the default presets are reloaded in all related registers, so no further adjustments in other registers are needed for proper operation. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 23 IRQ and Status register differs if the chip is configured as RFID reader or as NFC device (including tag emulation). The case of NFC operation is presented in Section 6.12. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 24 ISO14443A, bit rate 106 kbps RX bit rate when TX rate ISO14443 A high bit rate 212 kbps different from RX rate (see register 0x03) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 25: Received Signal Strength Indicator (Rssi)

    Internal Auxiliary RSSI values are stored in the RSSI Levels and Oscillator Status register (0x0F). The nominal relationship between the input RF peak level and the RSSI value is shown in Figure 6-5. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 26 RX_IN1 input and the 3-bit code is shown in Figure 6-6. RF Input Voltage Level at RF_IN1 in mV Figure 6-6. Digital External RSSI Value vs RF Input Level in V (mV) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 27: Oscillator Section

    A 27-pF capacitor must be placed on pins 30 and 31 to ensure proper crystal oscillator operation. TRF7970A Pin 30 Pin 31 Crystal Figure 6-7. Crystal Block Diagram Any crystal used with TRF7970A should have minimum characteristics shown in Table 6-9. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 28: Transmitter - Analog Section

    Load the number of bytes to be sent into registers 0x1D and 0x1E and load the data to be sent into the FIFO (address 0x1F), followed by sending a transmit command (see Direct Commands section). The transmission then starts when the transmit command is received. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 29: Transmitter - External Power Amplifier And Subcarrier Detector

    = 0 enables a digital output, B3 = 1 enables an analog output). The design of an external power amplifier requires detailed RF knowledge. There are also readily designed and certified high-power HF reader modules on the market. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 30: Trf7970A Ic Communication Interface

    (8 clocks) and then to generate another 8 clocks for reading out the data. The I/O_5 pin goes high during the second 8 clocks. But for normal SPI operations, I/O_5 pin is not used. (5) Slave_Select pin is active low Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 31 Examples of expected communications between an MCU and the TRF7970A are shown in the following sections. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 32 Figure 6-8. Continuous Address Register Write Example Starting with Register 0x00 Using SPI With SS Figure 6-9. Continuous Address Register Read Example Starting with Register 0x00 Using SPI With SS Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 33 Figure 6-10. Single Address Register Write Example of Register 0x00 Using SPI With SS Figure 6-11. Single Address Register Read Example of Register 0x00 Using SPI With SS Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 34 The maximum number of bytes that can be loaded into the FIFO in a single sequence is 127 bytes. NOTE The number of bytes in a frame, transmitted or received, can be greater than 127 bytes. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 35: Parallel Interface Mode

    • The StopSmpl condition is also used to terminate the direct mode. Figure 6-14. Parallel Interface Communication With Simple Stop Condition (StopSmpl) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 36 If the reader detects a receive error, the corresponding error flag is set (framing error, CRC error) in the IRQ Status register, indicating to the MCU that reception was not completed correctly. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 37 Stop condition. When first establishing communications with the TRF7970A, the SOFT_INIT (0x03) and IDLE (0x00) commands should be sent first from the MCU (see Table 6-19). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 38 No Data Transitions (All High or Low) Ignore Don’t Care MISO SLAVE SELECT Figure 6-17. Procedure for Dummy Read Figure 6-18. Example of Dummy Read Using SPI With SS Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 39 No Data Transitions (All High or Low) No Data Transitions (All High or Low) MISO DON’T CARE SLAVE SELECT Figure 6-20. Continuous Read Operation Using SPI With Slave Select Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 40 In the example in Figure 6-23, this IRQ occurs approximately 1.6 ms after the SS line goes high after the Inventory command is sent out. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 41 The next byte is the DSFID (usually shipped by manufacturer as 0x00), then the UID, shown here up to the next most significant byte, the MFG code (shown as 0x07 (TI silicon)). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 42 At this point, it is good form to reset the FIFO and then read out the RSSI value of the tag. In this case the transponder is very close to the antenna, so value of 0x7F is recovered. Figure 6-26. Reset FIFO and Read RSSI Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 43: Direct Mode

    ISO standard communications, then deviated from the standard after being identified and selected, the ability to go into Direct Mode 0 becomes very useful. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 44 RX Wait Time register (0x08) to 0x07 • Modulator control register (0x09) to 0x21 (or any custom modulation) • RX Special Settings register (0x0A) to 0x20 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 45 6 of the Chip Status Control register (0x00), making it a 0. Figure 6-28. Entering Direct Mode 0 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 46 As an example of the receive data bits and framing level according to the ISO14443A standard is shown Figure 6-31 (taken from ISO14443 specification and TRF7970A air interface). Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 47 I/O_6 line during the RX process while in Direct Mode 0. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 48: Special Direct Mode For Improved Mifare™ Compatibility

    NFC Target Detection Level Register (0x18) – defines level for RF level for wake-up and gives information of NFCID size. This register is directly supplied by VEXT to ensure data retention during complete power down. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 49 The first reader command was of ISO14443B type Nfcbr1 00 = N/A 01 = 106 kbps Bit rate of first received command 10 = 212 kbps Nfcbr0 11 = 424 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 50 No-response Wait Time register (0x07). Signals the MCU that next slot command can be sent. Only for ISO15693. (1) Displays the cause of IRQ and TX/RX status Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 51: Direct Commands From Mcu To Reader

    Adr 3 Cmd 3 Address/Command bit 2 Adr 2 Cmd 2 Address/Command bit 1 Adr 1 Cmd 1 Address/Command bit 0 Adr 0 Cmd 0 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 52 NFC Target Detection Level 0x00 0x19 NFC Target Protocol 0x00 0x1A Test 0x00 0x1B Test 0x00 0x1C FIFO status 0x00 (1) Differs from default at POR Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 53 SOF signal, and if the noise pattern matched the SOF pattern, an interrupt would be generated, falsely signaling the start of an RX operation. A constant flow of interrupt requests can be a problem for Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 54 Tag communication for the Check RF command to work properly. Table 6-23. Test External RF Peak Level to RSSI Codes RF_IN1 [mV Decimal Code Binary Code Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 55: Register Description

    Adjustable FIFO IRQ Levels Register 0x15 Reserved 0x16 NFC Low Field Detection Level 0x17 NFCID1 Number (up to 10 bytes wide) 0x18 NFC Target Detection Level Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 56 Test Register. Preset 0x00 0x1B Test Register. Preset 0x00 FIFO Registers 0x1C FIFO status 0x1D TX length byte 1 0x1E TX length byte 2 0x1F FIFO I/O register Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 57: Detailed Register Description

    0 = target 1 = initiator NFC: iso_3 RFID / NFC Mode 0 = passive mode 1 = active mode (1) Only applicable to ISO-14443A and ISO-15693 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 58 NFC Mode (B5 = 1, B2 = 0) or Card Emulation (B5 = 1, B2 = 1) Card Emulation ISO_1 ISO_0 (B5 = 1, B2 = 0) (B5 = 1, B2 = 1) ISO14443A 106 kbps ISO14443B 212 kbps 424 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 59 TX For 14443A high bit rate, coding and decoding 1 = parity odd except last parity-2rx byte which is even for RX Unused Unused Unused Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 60 Timer Length All bits low = timer disabled (0x00) tm_length2 Timer Length tm_length1 Timer Length Preset 0x00 for all other protocols tm_length0 Timer Length LSB Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 61 604 µs → Reserved 755 µs → ISO15693 high data rate (TI Tag-It HF-I) NoResp0 No response LSB 1812 µs → ISO15693 low data rate (TI Tag-It HF-I) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 62 Rxw3 9.44 µs → FeliCa Rxw2 66 µs → ISO14443A and B Rxw1 180 µs → Reserved Rxw0 293 µs → ISO15693 (TI Tag-It HF-I) Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 63 Mod Type and % Modulation depth MSB ASK 10% OOK (100%) ASK 7% Modulation depth ASK 8.5% ASK 13% ASK 16% Modulation depth LSB ASK 22% ASK 30% Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 64 The setting of bits B4, B5, B6 and B7 to zero selects bandpass characteristic of 240 kHz to 1.4 MHz. This is appropriate for ISO14443B, FeliCa protocol, and ISO14443A higher bit rates 212 kbps and 424 kbps. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 65 DD_X = 2.8 V, V and V = 2.8 V DD_RF DD_A DD_X = 2.7 V, V and V = 2.7 V DD_RF DD_A DD_X Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 66: Status Registers

    B5 and B7 can be changed. During Receive only bit B6 can be changed, but does not trigger the IRQ line immediately. The IRQ signal is set at the end of Transmit and Receive phase. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 67 ISO14443A mainly supported, in the other protocols this register shows the bit position of error. Either frame, SOF/EOF, parity or CRC error. Col3 Col2 Col1 Col0 Bit position of collision LSB Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 68 0 = 7 subcarrier pulses Selects the number of subcarrier pulses that trigger collision error in the col_7_6 1 = 6 subcarrier pulses 14443A - 106 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 69 Hash4 Hash3 Rfdet_I2 RF field level for RF Comparator output is displayed in B6 of the NFC Target Protocol register Rfdet_I1 collision avoidance (0x19) Rfdet_I0 Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 70 Comparator output is displayed in B7 of the NFC Target Protocol register system wakeup. If all bits (0x19) Rfdet_h1 are 0, then the RF level Rfdet_h0 detection is off. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 71 The first reader command was ISO14443B emulation NFCBR1 00 = Reserved Bit rate of first received 01 = 106 kbps command 10 = 212 kbps NFCBR0 11 = 424 kbps Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 72 Description test_rf_level RF level test test_io1 I/O test Not implemented test_io0 test_dec Decoder test mode clock_su Coder clock 13.56 MHz For faster test of coders Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 73 Bits B0:B6 indicate how many bytes that are in the FIFO to be read out (= N number of bytes, in hex) FIFO bytes fb[1] FIFO bytes fb[0] Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 74 It is taken into account only when broken byte flag is set. Broken byte number of bits bb[0] Broken byte flag B0 = 1, indicates that last byte is not complete 8 bits wide. Detailed Description Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 75: Application Schematic And Layout Considerations

    12KB and uses a minimum of 1KB RAM. An MCU capable of running its GPIOs at 13.56 MHz is required for Direct Mode 0 operations. Application Schematic and Layout Considerations Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 76: Trf7970A Reader System Using Spi With Ss Mode

    12KB and uses a minimum of 1KB RAM. An MCU capable of running its GPIOs at 13.56 MHz is required for Direct Mode 0 operations. Application Schematic and Layout Considerations Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 77: Layout Considerations

    Starting with the 4-Ω source, the process of going from 4 Ω to 50 Ω can be represented on a Smith Chart simulator (available from http://www.fritz.dellsperger.net/). The elements are combined where appropriate (see Figure 7-3). Application Schematic and Layout Considerations Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 78 SLOS743K – AUGUST 2011 – REVISED APRIL 2014 www.ti.com Figure 7-3. Impedance Matching Circuit This yields the Smith Chart Simulation shown in Figure 7-4. Figure 7-4. Smith Chart Simulation Application Schematic and Layout Considerations Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 79: Reader Antenna Design Guidelines

    For HF antenna design considerations using the TRF7970A, see these documents: • Antenna Matching for the TRF7960 RFID Reader (SLOA135) • TRF7960TB HF RFID Reader Module User's Guide (SLOU297) Application Schematic and Layout Considerations Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7970A...
  • Page 80: Device And Documentation Support

    All other trademarks are the property of their respective owners. Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 81 PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2014 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) TRF7970ARHBR ACTIVE VQFN 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR &...
  • Page 82 PACKAGE OPTION ADDENDUM www.ti.com 4-Apr-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2...
  • Page 83: Tape And Reel Information

    PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) TRF7970ARHBR VQFN 3000 330.0 12.4 12.0 TRF7970ARHBT VQFN 180.0 12.4...
  • Page 84 PACKAGE MATERIALS INFORMATION www.ti.com 15-Jan-2015 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) TRF7970ARHBR VQFN 3000 367.0 367.0 35.0 TRF7970ARHBT VQFN 210.0 185.0 35.0 Pack Materials-Page 2...
  • Page 88: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
  • Page 89 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments TRF7970AEVM TRF7970ATB...

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