Interrupt Priority Level Structure - Siemens C541U User Manual

8-bit cmos microcontroller
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7.2

Interrupt Priority Level Structure

A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low-
priority interrupt. A high-priority interrupt cannot be interrupted by any other interrupt source.
If two requests of different priority level are received simultaneously, the request of higher priority is
serviced. If requests of the same priority are received simultaneously, an internal polling sequence
determines which request is serviced. Thus, within each priority level there is a second priority
structure determined by the polling sequence (vertical and horizontal) as shown in table 7-1 below.
If e.g. the external interrupt 0 and the SSC interrupt have the same priority and if they are active
simultaneously, the external interrupt 0 will be serviced first.
Table 7-1
Interrupt Source Structure
Interrupt Source
High Priority
External Interrupt 0
Timer 0 Interrupt
External Interrupt 1
Timer 1 Interrupt
Semiconductor Group
SSC Interrupt
USB Endpoint Interrupt
USB Device Interrupt
7-17
Interrupt System
Priority
Low Priority
High
Low
C541U
1997-10-01

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