Siemens C541U User Manual page 107

8-bit cmos microcontroller
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The device interrupt enable register DIER contains the enable bits for the different types of device
interrupts. With these bits, the device interrupts can be individually enabled or disabled. The general
device interrupt enable bit EUDI is located in SFR IEN1. A device interrupt can be only generated
if EUDI and EA (global interrupt enable bit in IEN0) are set too.
USB Device Interrupt Enable Register DIER (Address C3 H )
Bit No.
MSB
7
C3 H
SE0IE
rw
Bit
Function
SE0IE
Single ended zero Interrupt Enable
Setting bit SE0IE enables the generation of a device interrupt each time a single
ended zero is detected for more than 2.5µs (reset by host, not EOP).
If SE0IE=0, the single ended zero interrupt is disabled.
If SE0IE=1, the single ended zero interrupt is enabled.
DAIE
Device attached interrupt enable
Setting bit DAIE enables the generation of a device interrupt when it is attached
to the USB bus.
If DAIE=0, the device attached interrupt is disabled.
If DAIE=1, the device attached interrupt is enabled.
DDIE
Device detached interrupt enable
Setting bit DDIE enables the generation of a device interrupt when it is detached
from the USB bus.
If DDIE=0, the device detached interrupt is disabled.
If DDIE=1, the device detached interrupt is enabled.
SBIE
Suspend begin interrupt enable
Setting bit SBIE enables the generation of a device interrupt if bit SBI is set, this
means the suspend mode is entered.
If SBIE=0, the suspend begin interrupt is disabled.
If SBIE=1, the suspend begin interrupt is enabled.
SEIE
Suspend change interrupt enable
Setting bit SEIE enables the generation of a device interrupt if bit SEI is set, this
means the suspend mode is left.
If SEIE=0, the suspend change interrupt is disabled.
If SEIE=1, the suspend change interrupt is enabled.
STIE
Status interrupt enable
Bit STIE enables the generation of a device interrupt at the end of the status phase
of a control transfer.
If STIE=0, the status interrupt is disabled.
If STIE=1, the status interrupt is enabled.
Semiconductor Group
6
5
DAIE
DDIE
SBIE
rw
rw
On-Chip Peripheral Components
4
3
2
SEIE
STIE
rw
rw
rw
6-62
Reset Value : 00 H
LSB
1
0
SUIE
SOFIE
DIER
rw
rw
1999-04-01
C541U

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