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Device Interrupts
SE0I
SE0IE
DIRR.7
DIER.7
DAI
DIRR.6
DIER.6
DDI
DIRR.5
DIER.5
SBI
DIRR.4
DIER.4
SEI
DIRR.3
DIER.3
STI
DIRR.2
DIER.2
SUI
DIRR.1
DIER.1
SOFI
SOFIE
DIRR.0
DIER.0
DRVI
DRVIE
GEPIR.7
DPWDR.7
Bit addressable
Request flag is cleared by hardware after the corresponding register has been read.
Figure 7-3
Interrupt Request Sources (Part 3)
Semiconductor Group
DAIE
DDIE
≥1
SBIE
SEIE
STIE
SUIE
0053
H
EUDI
IEN1.2
EA
IE0.7
7-3
Interrupt System
Low Priority
High Priority
PUDI
IP1.2
1997-10-01
C541U
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