UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board Important notice NXP provides the enclosed product(s) under the following conditions: This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals.
The tool summary page for FRDM-GD3100EVM is at http://www.nxp.com/FRDM- GD3100EVM. The overview tab on this page provides an overview of the device, a list of device features, a description of the kit contents, links to supported devices and a Get Started section.
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board 4.2 Device features Table 1. Device features Device Description Features MC33GD3100 The MC33GD3100 is an • Compatible with current sense and temp advanced single channel sense IGBTs gate driver for IGBTs. • DESAT detection capability for detecting desaturation condition •...
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board Figure 2. Connecting FRDM-KL25Z, GD3100 half-bridge EVB and translator board 4.3.1 Voltage domains, GD3100 pinout, logic header and IGBT pinout Low-voltage domain is 12 V VPWR domain that interfaces with the MCU and MC33GD3100 control registers through the 24-pin connector interface.
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UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board Figure 3. Evaluation board voltage and interface domains Table 2. 24-pin connector definitions Name Function AOUTL Duty cycle encoded signal (low-side) VSUP Power input (+12 V) CSBL Chip select bar (low-side) 5.0 V power PWML...
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board 4.3.2 Test point definitions All test points are clearly marked on the evaluation board. Figure 4 shows the location of various test points. Figure 4. Key test point locations Table 3. Test point definitions Test point...
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UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board Test point Definitions VREFL 5.0 V reference test point for isolated analog circuitry on low-side driver FSISOL Fail-safe state management test point for low-side driver domain TSENSEAL Temperature sense test point connected to anode of IGBT temp sense diode and...
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board 4.3.3 Power supply and fail-safe jumper configuration Figure 5. Power supply and jumper configuration Table 4. Jumper definitions Jumper Position Function JVPWR shorted VSUP = VPWR external 12 V connection OPEN VSUP is isolated from VPWR...
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board Jumper Position Function open TSENSEA HS non-active (internal test mode only) JVDDL shorted VDDL to VPWR connection Short only when low voltage domain is powered by external 5.0 V open VDDL isolated from external VSUP supply...
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UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board • RAMC - series resistor between IGBT gate and AMC input pin of the MC33GD3100 high-side/low-side driver for gate sensing and Active Miller clamping. Figure 7. Gate drive resistors UM11108 All information provided in this document is subject to legal disclaimers.
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board 4.3.6 LED interrupt indicators Figure 8. LED interrupt indicators Table 5. LED interrupt indicators Description Low-side INTB Connected to the INTB output pin of low-side driver indicating reported fault status when on (active low) High-side INTB...
4.4 Quick start 4.4.1 Scope and purpose This section provides comprehensive quick start notes for the FRDM-GD3100EVM half- bridge evaluation kit. Within a few minutes it is possible install SPIGEN application on a PC, power up half-bridge evaluation kit, and start SPI communication with the GD3100 devices as well as pass PWM signals for evaluation.
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board 2. Assemble the FRDM-GD3100EVM with KL25Z micro board and translator board as shown in Figure 3. Check jumper configuration on the evaluation board. The default jumper configuration (shipped from factory) is setup for non-daisy chain SPI communication with high-...
GD3100 translator enables level shifting of signals from 3.3 V to 5.0 V SPI communication. Figure 11. Translator board Configuring the hardware FRDM-GD3100EVM is connected to U Phase of a Fuji M653 IGBT module with SBE DC Link capacitor as shown in Figure 12. Double pulse and short-circuit testing can be conducted utilizing Windows based PC with SPIGEN software.
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board • High sample rate digital oscilloscope with probes • DC link capacitor • Fuji M653 or M6+ IGBT module • Windows based PC • High voltage DC power supply for DC link • Low voltage DC power supply for VPWR –...
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board cable. Firmware files are available with SPIGEN install which can be downloaded from NXP.com and can be found in SPIGEN install directory folder. 2. Run SPIGEN SPI generator software installer to install SPIGEN on PC.
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board 6.1.3 Double pulse and short-circuit test See MC33GD3100 data sheet for SPI configuration register descriptions. Figure 17. Double pulse and short circuit test window Schematics, board layout and bill of materials The board schematics, board layout and bill of materials are available at http:// www.nxp.com/FRDM-GD3100EVM...
UM11108 NXP Semiconductors FRDM-GD3100EVM half-bridge evaluation board References Following are URLs where you can obtain information on related NXP products and application solutions: NXP.com support pages Description FRDM-GD3100EVM Tool summary page http://www.nxp.com/FRDM-GD3100EVM GD3100 Product summary page http://www.nxp.com/GD3100 Revision history Revision history...
NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or 9.2 Disclaimers applications and therefore such inclusion and/or use is at the customer's own risk.
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