Sony BCU-100 Maintenance Manual page 191

BKCU-EX1 (SY)
RESET
+2.5V
+3.3V
+3.3V
C210 C212
R222
10uF 0.1uF
100k
6.3V
IC203 IC202 (5/7)
IC202 (6/7)
2
R3112N221A-TR-FA R221 SN74LVC14APWR SN74LVC14APWR
GND 0
VDD 1 GND 11 10 13 12 2 VCC
OUT A
4 5 1
NC CD B
GND GND
0.0033uF
C211 R376
3 R224
1k 1k
GND GND
R377
Q201
0
DTC114EE-TL
007 RST_BOARD
Power On Reset
Q200
DTC114EE-TL
R378
0
007 EP1C_CNF_DONE
+12V
Vs=0.5Vx(R1+R2)/R2 C200
0.1uF
=10.17V
25V
+3.3V
Vhys=2.5E-6xR1
R1 C201
4.7uF
=0.25V
R209
16V
R200
IC202 (3/7)
4.7k
100k 5
SN74LVC14APWR
VCC
8 3 4 9 8
RESET
2
R207
R2 VS
0 IC202 (4/7)
1
CT SN74LVC14APWR
R201 GND
+3.3V
4.7k
4 C204 C206
+3.3V
220pF
0.1uF
R202
470
C202 C205
25V R208
10uF 0.1uF
100k
6.3V
2
IC201 R206 SN74LVC14APWR
IC200
GND GND
TL7700CPS-E20 VDD 1 0
R3112N281A-TR-FA
OUT
R205
4 5 1k
NC CD
GND C203
0.022uF
3
T=CTx1E5
GND GND
GND
CL212 CL211
Rev007
+3.3V
Rev008
+3.3V
+3.3V
+3.3V FB200
001 PCI-Express_Sub C213
0.01uF
R381
R380 R223
4.7k
4.7k 4.7k
16
GND
2 VCC 4
1B1 1A
3
SMCLK
1B2
5 7
2B1 2A
SMDAT 6
2B2
11 9
R215
3B1 3A
0 NM
10
WAKE#
3B2
14 12
4B1 4A
13
PERST#
4B2
IC204
Rev006
SN74CBTLV3257PWR
1
007 I2CSEL S
15
OE
GND
8
GND
003 REFCLK_CTRL
+3.3V +3.3V
R213
R212 FB201
4.7k
4.7k
TSSOP
R214
R210
10k
10k
IC205
C207 ICS9DB104BGLFT
0.01uF
1
VDD1
CL202 2
REFCLK+
SRC_IN
CL203 3
REFCLK-
SRC_IN#
4
GND1
C208 0.01uF 5
VDD2
6
R217 33
002 REFCLK1+ DIF_1
7
002 REFCLK1- DIF_1#
33 8
REFCLK_OE1 R218
to PCI_FPGA OE_1
9
R219 33
003 REFCLK2+ DIF_2
R220 33 10
003 REFCLK2- DIF_2#
R287 R288 11
VDD3
47 47
REFCLK_ BYPASS/PLL 0.01uF 12
C209
BYPASS#/PLL
13
REFCLK_SCLK
SCLK
14
REFCLK_SDATA
SDATA
R211
GND
10k
GND
NM
GND
001 PCI-Express
BCU-100 MM
A B
+3.3V
C214 C218
0.1uF 0.1uF
4 2 VCC 4
Y A Y RESET 007
R246
IC206 22
1
TC7SZ08FU(TE85R)
B
GND
5 5
IC207
3 3
TC7SZ08FU(TE85R)
003,004 PIPE_IF1
+3.3V
C219 +1.25VTT
0.1uF
VCC
R247
IC202 (7/7) 47 PP1_TXDA[7]
GND
R248
SN74LVC14APWR 47 PP1_TXDA[6]
R249
47
PP1_TXDA[5]
R250 47
PP1_TXDA[4]
R251 47
PP1_TXDA[3]
R252 47
PP1_TXDA[2]
T=0.69x6.5E6xC
R253 47
PP1_TXDA[1]
R254 47
PP1_TXDA[0]
PP1_TXDKA
R255
47
R382
0 R256 47
PP1_TXCMPA
R257 47
PP1_TXDB[7]
R258 47
PP1_TXDB[6]
R259 47
PP1_TXDB[5]
R260 47
PP1_TXDB[4]
IC202 (1/7)
R261
47 PP1_TXDB[3]
R262
1 2 5 6 47 PP1_TXDB[2]
RESTART 007
R263
47 PP1_TXDB[1]
R264
IC202 (2/7) 47 PP1_TXDB[0]
S200 SN74LVC14APWR
PP1_TXDKB
R265 47
R266
47
PP1_TXCMPB
R267 47
PP1_TX PP1_TXDC[7]
R268
47 PP1_TXDC[6]
R269
47 PP1_TXDC[5]
R270
47 PP1_TXDC[4]
R271
47 PP1_TXDC[3]
R272 47
PP1_TXDC[2]
R273 47
PP1_TXDC[1]
R225 R226 R227
R274 47
PP1_TXDC[0]
4.7k 10k 10k
PP1_TXDKC
R275
47
L_SMCLK 003,007
R276 47
PP1_TXCMPC
L_SMDAT 003,007
R277
47 PP1_TXDD[7]
R278
L_WAKE# 003 47 PP1_TXDD[6]
R279 47
PP1_TXDD[5]
L_PERST# R280 47
003,007 PP1_TXDD[4]
R281 47
PP1_TXDD[3]
R282 47
PP1_TXDD[2]
R283 47
PP1_TXDD[1]
R284
47 PP1_TXDD[0]
PP1_TXDKD
R285 47
R286 47
PP1_TXCMPD
+3.3V
R233
R235
10k
10k
FB202 R232 R237
10k
10k
C215
0.01uF NM
28 Standard : 475ohm
VDDA
27 R239
GNDA
470
26
IREF
25
GND2
GND
24
VDD5
23
C216
DIF_6
22 0.01uF
DIF_6#
21
REFCLK_OE6
OE_6
20
R230 33
DIF_5
19 R231 33
DIF_5#
18
VDD4
17 0.01uF
C217 REFCLK_BW_ HIGH /Low
HIGH_BW#
16
REFCLK_SRC_STOP
SRC_STOP#
15
REF_CLK_PD
PD#
GND
R234 R236
10k 10k
REFCLK1+
NM NM 002
002 REFCLK1-
GND
R244
R245
47 47
GND
C
MEM-122 (2/7) MEM-122 (2/7)
SUFFIX: -12 SUFFIX: -12
+1.8V_PHYD
+2.5V_PHY
+2.5V
PCI-Express PHY
R297
R301
GND GND
10k
10k
C229
C220
0.1uF
0.1uF
R298
R302
10k 10k
GND
47
PP1_TXDA[7]
TXDA7[C17]
PP1_TXDA[6] 106
TXDA6[C16]
198
PP1_TXDA[5]
TXDA5[E14]
156
PP1_TXDA[4]
TXDA4[D15]
199
PP1_TXDA[3]
TXDA3[D14]
104
PP1_TXDA[2]
TXDA2[E16]
158
PP1_TXDA[1]
TXDA1[C14]
200
PP1_TXDA[0]
TXDA0[D13]
155
PP1_TXDKA
TXDKA[E15]
144
PP1_TXIDLEA
TXIDLEA[R14]
PP1_TXCMPA 154
TXCMPA[F15]
96
PP1_TXDB[7]
TXDB7[N16]
149
PP1_TXDB[6]
TXDB6[L15]
37
PP1_TXDB[5]
TXDB5[N17]
148
PP1_TXDB[4]
TXDB4[M15]
97
PP1_TXDB[3]
TXDB3[M16]
193
PP1_TXDB[2]
TXDB2[K14]
98
PP1_TXDB[1]
TXDB1[L16]
PP1_TXDB[0] 39
TXDB0[L17]
99
PP1_TXDKB
TXDKB[K16]
142
PP1_TXIDLEB
TXIDLEB[R12]
192
PP1_TXCMPB
TXCMPB[L14]
134
PP1_TXDC[7]
TXDC7[R4]
80
PP1_TXDC[6]
TXDC6[T3]
135
PP1_TXDC[5]
TXDC5[R5]
18
PP1_TXDC[4]
TXDC4[U2]
PP1_TXDC[3] 181
TXDC3[P6]
81
PP1_TXDC[2]
TXDC2[T4]
136
PP1_TXDC[1]
TXDC1[R6]
20
PP1_TXDC[0]
TXDC0[U4]
182
PP1_TXDKC
TXDKC[P7]
24
PP1_TXIDLEC
TXIDLEC[U8]
133
PP1_TXCMPC
TXCMPC[R3]
126
PP1_TXDD[7]
TXDD7[H3]
PP1_TXDD[6] 71
TXDD6[H2]
127
PP1_TXDD[5]
TXDD5[J3]
8
PP1_TXDD[4]
TXDD4[H1]
174
PP1_TXDD[3]
TXDD3[J4]
9
PP1_TXDD[2]
TXDD2[J1]
128
PP1_TXDD[1]
TXDD1[K3]
73
PP1_TXDD[0]
TXDD0[K2]
129
PP1_TXDKD
TXDKD[L3]
PP1_TXIDLED 84
TXIDLED[T7]
7
PP1_TXCMPD
TXCMPD[G1]
C221
0.1uF
PERp0 109
TXPA[B14]
C222
0.1uF
52
PERn0
TXNA[A14]
C223
0.1uF 113
PERp1
TXPB[B10]
C224
0.1uF
PERn1 56
TXNB[A10]
C225
0.1uF
117
PERp2
TXPC[B6]
C226
0.1uF
60
PERn2
TXNC[A6]
C227
0.1uF 65
PERp3
TXPD[B2]
C228
0.1uF
64
PERn3
TXND[A2]
R289 0 107
PETp0
RXPA[B16]
R290 50
PETn0 0
RXNA[A16]
R291 0 111
PETp1
RXPB[B12]
R292 0 54
PETn1
RXNB[A12]
0 115
PETp2 R293
RXPC[B8]
R294 0 58
PETn2
RXNC[A8]
0 119
PETp3 R295
RXPD[B4]
R296 0
PETn3 62
RXND[A4]
1
REFCLKP[A1]
2
REFCLKN[B1]
205
RTERM[D8]
R299
4.7k
R300
330
GND
5-61 5-61
D E
+1.8V_PHYA
GND
101
R304
RXDA7[H16]
100 R305
RXDA6[J16]
195 R306
RXDA5[H14]
43 R307
RXDA4[G17]
152 R308
RXDA3[H15]
102
R309
RXDA2[G16]
153
R310
RXDA1[G15]
103
R311
RXDA0[F16]
45
R312
RXDKA[E17]
90
R313
RXIDLEA[T13]
31
RXPLRA[U15]
187 R314
RXVLDA[P12]
46 R315
RXSTSA2[D17]
196 R316
RXSTSA1[G14]
197 R317
RXSTSA0[F14]
188 R318
RXDB7[P13]
32 R319
RXDB6[U16]
189 R320
RXDB5[P14]
R321
145
RXDB4[R15]
190 R322
RXDB3[N14]
93 R323
RXDB2[T16]
146 R324
RXDB1[P15]
94 R325
RXDB0[R16]
147 R326
RXDKB[N15]
89 R327
RXIDLEB[T12]
29
RXPLRB[U13]
186 R328
RXVLDB[P11]
R329
34
RXSTSB2[T17]
R330
191
RXSTSB1[M14]
36 R331
RXSTSB0[P17]
75 R332
RXDC7[M2]
131 R333
RXDC6[N3]
13 R334
RXDC5[N1]
177 R335
RXDC4[M4]
15 R336
RXDC3[R1]
R337
132
RXDC2[P3]
R338
IC208 77
RXDC1[P2]
(1/1)
R339
178
GL9714-REV.E RXDC0[N4]
16 R340
RXDKC[T1]
85 R341
RXIDLEC[T8]
86
RXPLRC[T9]
23 R342
RXVLDC[U7]
179 R343
RXSTSC2[P4]
R344
78
RXSTSC1[R2]
180 R345
RXSTSC0[P5]
66 R346
RXDD7[C2]
171 R347
RXDD6[F4]
170 R348
RXDD5[E4]
123 R349
RXDD4[E3]
122 R350
RXDD3[D3]
124 R351
RXDD2[F3]
R352
68
RXDD1[E2]
R353
172
RXDD0[G4]
5 R354
RXDKD[E1]
183 R355
RXIDLED[P8]
138
RXPLRD[R8]
22 R356
RXVLDD[U6]
125 R357
RXSTSD2[G3]
69
RXSTSD1[F2]
173
RXSTSD0[H4]
26
OPMODE1[U10]
139
OPMODE0[R9]
88
PD0[T11]
185
PD1[P10]
27
TESTC[U11]
87
TESTD[T10]
141
TXDET/LPBK[R11]
21
R360
PHYSTS[U5]
91 R361
PCLK[T14]
140
SCC[R10]
R375
28
RST_N[U12]
4
OSC25MI[D1] CLK25M_PHY
3
OSC25MO[C1]
CL204
R303
0
NM
RST_PHY
F G
1
22 PP1_RXDA[7]
22 PP1_RXDA[6]
22
PP1_RXDA[5]
22
PP1_RXDA[4]
22
PP1_RXDA[3]
22
PP1_RXDA[2] 2
22 PP1_RXDA[1]
22 PP1_RXDA[0]
22 PP1_RXDKA
22 PP1_RXIDLEA
PP1_RXPLRA
22
PP1_RXVLDA
22
PP1_RXSTSA[2]
22
PP1_RXSTSA[1]
22
PP1_RXSTSA[0]
22
PP1_RXDB[7]
22
PP1_RXDB[6]
22
PP1_RXDB[5]
22
PP1_RXDB[4]
22
PP1_RXDB[3]
22
PP1_RXDB[2]
22
PP1_RXDB[1]
22
PP1_RXDB[0]
22
PP1_RXDKB
22
PP1_RXIDLEB
PP1_RXPLRB
22
PP1_RXVLDB
22 3
PP1_RXSTSB[2]
22
PP1_RXSTSB[1]
22
PP1_RXSTSB[0]
PP1_RX
22
PP1_RXDC[7]
22
PP1_RXDC[6]
22
PP1_RXDC[5]
22
PP1_RXDC[4]
22
PP1_RXDC[3]
22
PP1_RXDC[2]
22
PP1_RXDC[1]
22
PP1_RXDC[0]
22
PP1_RXDKC
22
PP1_RXIDLEC
PP1_RXPLRC
22
PP1_RXVLDC
22
PP1_RXSTSC[2]
22
PP1_RXSTSC[1]
22
PP1_RXSTSC[0]
22
PP1_RXDD[7]
22
PP1_RXDD[6]
22
PP1_RXDD[5]
4
22
PP1_RXDD[4]
22
PP1_RXDD[3] MEM-122
22
PP1_RXDD[2]
22
PP1_RXDD[1]
(2/7)
22
PP1_RXDD[0]
22
PP1_RXDKD
22 BOARD NO.
PP1_RXIDLED
PP1_RXPLRD
1-876-302-12
22
PP1_RXVLDD
SJXA-662_MEM-122_008_2
22
PP1_RXSTSD[2]
22 R358
PP1_RXSTSD[1]
22 R359
PP1_RXSTSD[0]
PP1_OPMODE[1]
+1.25VTT
PP1_OPMODE[0]
PP1_PD[0] R379 +2.5V_PHY
47
PP1_PD[1] PP1_TESTC
R362 4.7k NM
PP1_TESTC PP1_TESTC
R363 4.7k
PP1_TESTD PP1_TESTD
PP1_TXDET/LPBK
22 PP1_PHYSTS
22 PP1_PCLK
PP1_SCC R364 5
0 10k
PP1_RST_N PP1_RST_N
R365
10k
Low Jitter 25MCLK PP1_OPMODE[1]
NM
NM 007 R366 10k
PP1_OPMODE[1]
R367 10k
PP1_OPMODE[0]
R368 10k NM
PP1_OPMODE[0]
R369 10k
PP1_PD[0]
R370 10k NM
PP1_PD[0]
R371 10k
PP1_PD[1]
R372 10k
PP1_PD[1]
007
NM
PP1_SCC R373 10k
PP1_SCC R374 10k
NM
GND
H